Part 1
요약·해설
MAX32672EVKIT는 작고 고신뢰인 ultra-low-power 32-bit MAX32672를 평가합니다. 8·16-bit 설계를 motion control, industrial sensor, battery medical device용 Cortex-M4로 이전하는 비용 효율적인 경로입니다.
Memory
dual-bank flash 1 MB, SRAM 200 KB, ECC
Analog
12-channel 12-bit 1 Msps SAR ADC
Debug
J5 Cortex 10-pin SWD, OpenOCD/J-Link
Part 2
접을 수 있는 영어 원문 전체
영어 원문 전체 펼치기
원문 SHA-256
35B535852E50228D110FA8BD3AAF5B129BD666AAEF2D1D1447D6BE5F52CC4583
.. _max32672_evkit:
MAX32672EVKIT
#############
Overview
********
The MAX32672 evaluation kit (EV kit) provides a platform for evaluating the capabilities
of the MAX32672 microcontroller, which is a small, high-reliability, ultra-low power,
32-bit microcontroller. The MAX32672 is a secure and cost-effective solution
for motion/motor control, industrial sensors, and battery-powered medical devices and offers legacy
designs an easy, cost-optimal upgrade path from 8-bit or 16-bit microcontrollers.
The Zephyr port is running on the MAX32672 MCU.
.. image:: ../../../../../../../boards/adi/max32672evkit/doc/img/max32672evkit.webp
:align: center
:alt: MAX32672EVKIT
Hardware
********
- MAX32672 MCU:
- High-Efficiency Microcontroller for Low-Power High-Reliability Devices
- Arm Cortex-M4 Processor with FPU up to 100MHz
- 1MB Dual-Bank Flash with Error Correction
- 200KB SRAM (160KB with ECC Enabled), Optionally Preserved in Lowest Power Modes
- EEPROM Emulation on Flash
- 16KB Unified Cache with ECC
- Resource Protection Unit (RPU) and MemoryProtection Unit (MPU)
- Dual- or Single-Supply Operation, 1.7V to 3.6V
- Wide Operating Temperature: -40°C to +105°C
- Flexible Clocking Schemes
- Internal High-Speed 100MHz Oscillator
- Internal Low-Power 7.3728MHz and Ultra-Low-Power 80kHz Oscillators
- 16MHz–32MHz Oscillator, 32.768kHz Oscillator(External Crystal Required)
- External Clock Input for CPU, LPUART, LPTMR
- Power Management Maximizes Uptime for Battery Applications
- 59.8μA/MHz ACTIVE at 0.9V up to 12MHz(CoreMark®)
- 56.6μA/MHz ACTIVE at 1.1V up to 100MHz(While(1))
- 3.09μA Full Memory Retention Power in BACKUPMode at VDD = 1.8V
- 350nA Ultra-Low-Power RTC at
- Wake from LPUART or LPTMR
- Optimal Peripheral Mix Provides Platform Scalability
- Up to 42 General-Purpose I/O Pins
- Up to Three SPI Master/Slave (up to 50Mbps)
- Up to Three 4-Wire UART
- Up to Three I2C Master/Slave 3.4Mbps High Speed
- Up to Four 32-Bit Timers (TMR)
- Up to Two Low-Power 32-Bit Timers (LPTMR)
- One I2S Master/Slave for Digital Audio Interface
- 12-Channel, 12-Bit, 1Msps SAR ADC with On-DieTemperature Sensor
- Security and Integrity
- Optional ECDSA-Based Cryptographic SecureBootloader in ROM
- Secure Cryptographic Accelerator for Elliptic Curve
- AES-128/192/256 Hardware Acceleration Engine
- Benefits and Features of MAX32672EVKIT:
- Selectable, On-Board, High-Precision Voltage Reference
- 128 x 128 (1.45in) Color TFT Display with SPI Interface
- Breadboard-Compatible Headers
- USB 2.0 Micro B-to-Serial UARTs
- UART0 and LPUART0 Interface Is Selectable through On-Board Jumpers
- All GPIOs Signals Accessed through 0.1in Headers
- 12 Analog Inputs Accessed through 0.1in Headers with Optional Filtering
- 10-Pin Arm® Cortex® SWD Connector
- Board Power Provided by USB Port
- On-Board, 3.3V LDO Regulator
- Test Loops Provided to Supply Optional VCORE Power Externally
- Individual Power Measurement on All IC Rails through Jumpers
- Two General-Purpose LEDs and One General-Purpose Pushbutton Switch
Supported Features
==================
Below interfaces are supported by Zephyr on MAX32672EVKIT.
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock and reset control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
Connections and IOs
===================
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| Name | Name | Settings | Description |
+===========+===============+===============+==================================================================================================+
| JP1 | VREF | | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects on-board, high-precision voltage reference. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects on-board, high-precision voltage reference. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP2 | P0_22 | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects red LED D1 from P0_22. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects red LED D1 to P0_22. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP3 | P0_23 | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects green LED D2 from P0_23. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects green LED D2 to P0_23. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP4 | I2C0_SCL | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C0_SCL. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C0_SCL. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP5 | I2C0_SDA | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C0_SDA. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C0_SDA. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP6 | I2C1_SCL | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C1_SCL. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C1_SCL. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP7 | I2C1_SDA | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C1_SDA. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C1_SDA. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP8 | I2C2_SCL | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C2_SCL. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C2_SCL. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP9 | I2C2_SDA | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects 2.2K pullup sourced by 3V3 from I2C2_SDA. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects 2.2K pullup sourced by 3V3 to I2C2_SDA. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP10 | UART_RX | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | 2-1 | | | Connects the USB serial bridge to UART0_RX (P0.8). | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | 2-3 | | | Connects the USB serial bridge to LUART0_RX (P0.26). | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP11 | UART_TX | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | 2-1 | | | Connects the USB serial bridge to UART0_TX (P0.9). | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | 2-3 | | | Connects the USB serial bridge to LUART0_TX (P0.27). | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP12 | VDDA | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects power from VDDA. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects power to VDDA. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP13 | VDD | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects power from VDD. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects power to VDD. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP14 | VCORE | +-----------+ | +----------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects power from VCORE from an external power supply through test loop TP6.| |
| | | +-----------+ | +----------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects power to VCORE from an external power supply through test loop TP6. | |
| | | +-----------+ | +----------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
| JP15 | LDO DUT | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Open | | | Disconnects power from 3.3V LDO. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | Closed | | | Connects power to 3.3V LDO. | |
| | | +-----------+ | +-------------------------------------------------------------------------------+ |
| | | | |
+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+
Detailed Description of Hardware
================================
Power Supply
************
The EV kit is powered by +5V, which is made available through VBUS on the Micro USB type-B
connector CN1. The blue VBUS LED (DS1) and the green 3.3V LED will illuminate
when the board is powered.
Single- or Dual-Supply Operation
********************************
The EV kit is configured for single-supply operation. For dual-supply operation,
install a jumper on JP14 and connect an external supply to TP6 (VCORE_EXT) and ground.
Refer to the MAX32672 data sheet for acceptable voltage values.
Current Monitoring
******************
Two pin headers provide convenient current monitoring points for VDDA EN (JP12), VDD EN (JP13),
and VCORE EN (JP14). JP14 is only used for current measurements when VCORE is supplied externally.
Low-Power Mode Current Measurements
***********************************
To accurately achieve the low-power current values, the EV kit must be configured such that
no outside influence (such as a pullup, external clock, or debugger connector) causes
a current source or sink on that GPIO. For these measurements, the board will be needed to be
configured as follows:
1. Remove jumpers JP2 through JP11.
2. Set SW2 to the DIS position and remove resistor R12.
3. Unplug the SWD connector.
Clocking
********
The MAX32672 clocking is provided by an external 16MHz crystal (Y1).
External Voltage Reference
**************************
The external voltage reference input VREF for the ADC can be sourced externally by a high-precision
external reference source (the MAX6071). VREF (JP1) allows the external reference
to be disconnected so that VREF can be sourced internally by VDDA.
UART Interface
**************
The EV kit provides a USB-to-UART bridge chip (the FTDI FT230XS-R). This bridge eliminates
the requirement for a physical RS-232 COM port. Instead, the IC’s UART access is through
the Micro USB type-B connector (CN1). The USB-to-UART bridge can be connected to the IC’s UART0 or
LPUART0 with jumpers JP10 (RX0) and JP11 (TX0). Virtual COM port drivers and guides for
installing Windows® drivers are available on the FTDI Chip website.
Boot Loader
***********
The boot loader is activated by the boot-load-enable slide switch (SW2).
This pulls P0_10 low and, upon a power cycle or reset, the device will enter boot loader mode.
GPIO and Alternate Function Headers
***********************************
GPIO and alternate function signals from the MAX32672
can be accessed through 0.1in-spaced headers J3 and J4.
Analog Headers
**************
The 12 analog inputs can be accessed through 0.1inspaced headers JH1, JH2, and JH3.
I2C Pullups
***********
The I2C ports can independently pulled up to V_AUX (3.3V default) through JP4 (I2C0_CL_PU) and JP5
(I2C0_DA_PU), JP6 (I2C1_CL_PU) and JP7 (I2C1_DA_PU), and JP8 (I2C2_CL_PU) and JP9 (I2C2_DA_PU).
Programming and Debugging
*************************
The IC can be reset by pushbutton SW1.
Programming and Debugging
*************************
Flashing
========
SWD debug can be accessed through an Arm Cortex 10-pin connector (J5).
Logic levels are set to 3V3 by default, but they can be set to 1.8V if TP5 (VDD_VDDA_EXT)
is supplied externally. Be sure to remove jumper JP15 (LDO_DUT_EN) to disconnect the 3.3V
LDO if supplying VDD and VDDA externally.
Once the debug probe is connected to your host computer, then you can simply run the
``west flash`` command to write a firmware image into flash.
.. note::
This board uses OpenOCD as the default debug interface. You can also use
a Segger J-Link with Segger's native tooling by overriding the runner,
appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
be connected to the standard 2*5 pin debug connector (JH2) using an
appropriate adapter board and cable.
Debugging
=========
Please refer to the `Flashing`_ section and run the ``west debug`` command
instead of ``west flash``.
References
**********
- `MAX32672EVKIT web page`_
.. _MAX32672EVKIT web page:
https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/max32672evkit.html
Part 3
한국어 전문 번역
개요
MAX32672 EV kit는 작고 신뢰성이 높으며 초저전력인 32-bit MAX32672 MCU의 기능을 평가합니다. motion/motor control, industrial sensor와 battery-powered medical device를 위한 안전하고 비용 효율적인 solution이며, 8-bit 또는 16-bit legacy design을 쉽게 업그레이드할 수 있습니다.
Zephyr port는 MAX32672 MCU에서 실행됩니다.
하드웨어
MAX32672 MCU
- 고효율·고신뢰 저전력 MCU: 최대 100 MHz FPU 포함 Arm Cortex-M4, ECC가 있는 1 MB dual-bank flash, SRAM 200 KB(ECC 사용 시 160 KB), 최저 전력 mode에서 선택적 SRAM 보존, flash 기반 EEPROM emulation, ECC가 있는 16 KB unified cache, RPU(Resource Protection Unit)와 MPU, 1.7~3.6 V dual/single supply, -40~+105°C 동작.
- 유연한 clock: internal 100 MHz high-speed oscillator, 7.3728 MHz low-power oscillator, 80 kHz ultra-low-power oscillator, external crystal이 필요한 16~32 MHz 및 32.768 kHz oscillator, CPU·LPUART·LPTMR external clock input.
- 전력 관리: 0.9 V·12 MHz 이하 CoreMark에서 59.8 μA/MHz, 1.1 V·100 MHz 이하 while(1)에서 56.6 μA/MHz, VDD 1.8 V BACKUP mode의 full-memory retention 3.09 μA, ultra-low-power RTC 350 nA, LPUART 또는 LPTMR wake-up.
- Peripheral: GPIO 최대 42개, 50 Mbit/s SPI master/slave 최대 3개, 4-wire UART 최대 3개, 3.4 Mbit/s high-speed I2C master/slave 최대 3개, 32-bit timer 최대 4개, low-power 32-bit timer 최대 2개, digital audio용 I2S master/slave 1개, on-die temperature sensor가 있는 12-channel 12-bit 1 Msps SAR ADC.
- 보안과 무결성: ROM의 optional ECDSA secure bootloader, elliptic-curve secure cryptographic accelerator, AES-128/192/256 hardware engine.
MAX32672EVKIT 기능
- 선택 가능한 on-board high-precision voltage reference
- SPI 128 × 128(1.45 inch) color TFT display
- breadboard-compatible header와 USB 2.0 Micro-B serial UART
- jumper로 선택하는 UART0/LPUART0, 0.1-inch header로 노출된 GPIO와 analog input 12개(optional filter)
- 10-pin Cortex SWD connector, USB board power, on-board 3.3 V LDO
- external VCORE용 test loop, rail별 power measurement jumper, LED 2개와 pushbutton 1개
지원 기능
Zephyr는 다음 interface를 지원합니다.
| Interface | Controller | Driver/Component |
|---|---|---|
| NVIC | on-chip | nested vector interrupt controller |
| SYSTICK | on-chip | systick |
| CLOCK | on-chip | clock and reset control |
| GPIO | on-chip | gpio |
| UART | on-chip | serial |
연결과 I/O
| Name | Signal | Setting | 설명 |
|---|---|---|---|
| JP1 | VREF | Open | on-board high-precision voltage reference 분리 |
| JP1 | VREF | Closed | on-board high-precision voltage reference 연결 |
| JP2 | P0_22 | Open | red LED D1을 P0_22에서 분리 |
| JP2 | P0_22 | Closed | red LED D1을 P0_22에 연결 |
| JP3 | P0_23 | Open | green LED D2를 P0_23에서 분리 |
| JP3 | P0_23 | Closed | green LED D2를 P0_23에 연결 |
| JP4 | I2C0_SCL | Open | 3V3 기반 2.2 kΩ pull-up 분리 |
| JP4 | I2C0_SCL | Closed | 3V3 기반 2.2 kΩ pull-up 연결 |
| JP5 | I2C0_SDA | Open | 3V3 기반 2.2 kΩ pull-up 분리 |
| JP5 | I2C0_SDA | Closed | 3V3 기반 2.2 kΩ pull-up 연결 |
| JP6 | I2C1_SCL | Open | 3V3 기반 2.2 kΩ pull-up 분리 |
| JP6 | I2C1_SCL | Closed | 3V3 기반 2.2 kΩ pull-up 연결 |
| JP7 | I2C1_SDA | Open | 3V3 기반 2.2 kΩ pull-up 분리 |
| JP7 | I2C1_SDA | Closed | 3V3 기반 2.2 kΩ pull-up 연결 |
| JP8 | I2C2_SCL | Open | 3V3 기반 2.2 kΩ pull-up 분리 |
| JP8 | I2C2_SCL | Closed | 3V3 기반 2.2 kΩ pull-up 연결 |
| JP9 | I2C2_SDA | Open | 3V3 기반 2.2 kΩ pull-up 분리 |
| JP9 | I2C2_SDA | Closed | 3V3 기반 2.2 kΩ pull-up 연결 |
| JP10 | UART_RX | 2-1 | USB serial bridge를 UART0_RX(P0.8)에 연결 |
| JP10 | UART_RX | 2-3 | USB serial bridge를 LPUART0_RX(P0.26)에 연결 |
| JP11 | UART_TX | 2-1 | USB serial bridge를 UART0_TX(P0.9)에 연결 |
| JP11 | UART_TX | 2-3 | USB serial bridge를 LPUART0_TX(P0.27)에 연결 |
| JP12 | VDDA | Open | VDDA power 분리 |
| JP12 | VDDA | Closed | VDDA power 연결 |
| JP13 | VDD | Open | VDD power 분리 |
| JP13 | VDD | Closed | VDD power 연결 |
| JP14 | VCORE | Open | TP6 external supply에서 VCORE power 분리 |
| JP14 | VCORE | Closed | TP6 external supply를 VCORE에 연결 |
| JP15 | LDO DUT | Open | 3.3 V LDO power 분리 |
| JP15 | LDO DUT | Closed | 3.3 V LDO power 연결 |
I2C port는 각각 V_AUX(기본 3.3 V)에 pull-up할 수 있습니다. I2C0은 JP4·JP5, I2C1은 JP6·JP7, I2C2는 JP8·JP9를 사용합니다. IC는 SW1 pushbutton으로 reset합니다.
프로그래밍과 디버깅
external debug probe를 사용합니다. SWD는 J5 Arm Cortex 10-pin connector에서 접근합니다. logic level은 기본 3.3 V이며 TP5(VDD_VDDA_EXT)를 외부 공급하면 1.8 V로 사용할 수 있습니다입니다.
debug probe를 host computer에 연결한 뒤 다음 명령으로 firmware image를 flash에 기록합니다.
west flash디버깅
flash 절차와 같은 연결을 사용하되 west flash 대신 다음 명령을 실행합니다.
west debug참고 자료
Source
출처
영어 원문에는 문단, 문서 지시문, 표, 코드, 코드 심벌, 경로를 그대로 보존했습니다.