User Mode Queues

Userspace 직접 제출 모델

KFD와 비슷하게 GPU engine queue를 userspace로 옮깁니다. 목적은 user process가 driver의 work 제출 IOCTL을 거치지 않고 GPU engine 제출을 직접 관리하게 하는 것입니다. 이는 overhead를 줄이고 GPU가 스스로 work를 제출할 수 있게 하며, application이 CPU를 왕복하지 않고 여러 GPU engine에 걸친 job work graph를 구성하게 합니다.

UMD는 application별 shared memory area를 통해 firmware와 직접 통신하며 핵심 수단은 queue입니다. Queue는 read pointer(`rptr`)와 write pointer(`wptr`)를 가진 ring buffer입니다. UMD가 IP별 packet을 queue에 쓰면 firmware가 이를 처리해 GPU engine의 work를 시작합니다.

Application의 CPU, 다른 queue 또는 device가 `wptr`을 갱신하여 firmware가 ring buffer의 어디까지 packet을 처리할지 알립니다. `rptr`은 firmware가 packet 실행을 얼마나 진행했는지 UMD에 feedback을 제공합니다. `wptr`과 `rptr`이 같으면 queue는 idle입니다.

==================
 User Mode Queues
==================

Introduction
============

Similar to the KFD, GPU engine queues move into userspace.  The idea is to let
user processes manage their submissions to the GPU engines directly, bypassing
IOCTL calls to the driver to submit work.  This reduces overhead and also allows
the GPU to submit work to itself.  Applications can set up work graphs of jobs
across multiple GPU engines without needing trips through the CPU.

UMDs directly interface with firmware via per application shared memory areas.
The main vehicle for this is queue.  A queue is a ring buffer with a read
pointer (rptr) and a write pointer (wptr).  The UMD writes IP specific packets
into the queue and the firmware processes those packets, kicking off work on the
GPU engines.  The CPU in the application (or another queue or device) updates
the wptr to tell the firmware how far into the ring buffer to process packets
and the rtpr provides feedback to the UMD on how far the firmware has progressed
in executing those packets.  When the wptr and the rptr are equal, the queue is
idle.

MQD, HQD와 doorbell 구조

현대 AMD GPU의 여러 engine은 engine마다 여러 queue를 지원합니다. Scheduling firmware는 사용 가능한 hardware queue slot에 user queue를 동적으로 schedule합니다. User queue 수가 slot 수보다 많으면 priority와 time quanta에 따라 queue를 mapping하고 unmapping합니다.

각 user queue 상태는 kernel driver의 MQD(Memory Queue Descriptor)에 저장됩니다. MQD는 GPU가 접근할 수 있는 memory의 buffer입니다. User queue가 mapping될 때 scheduling firmware는 MQD를 사용해 queue state를 HQD(Hardware Queue Descriptor)에 load합니다.

대부분의 engine은 ring buffer, firmware가 userspace에 rptr을 shadow할 rptr buffer, application이 firmware용 wptr을 쓸 wptr buffer, doorbell을 요구합니다. Doorbell은 특정 user queue에 mapping할 수 있는 device MMIO BAR의 일부입니다. Application이 doorbell에 쓰면 firmware를 깨우고 wptr을 fetch하여 queue packet 처리를 시작하게 합니다.

각 4K doorbell BAR page는 engine별 offset range를 가지며 queue doorbell은 해당 queue가 사용하는 IP(GFX, VCN, SDMA 등)에 맞춰 aperture에 mapping해야 합니다. Aperture는 NBIO register로 설정됩니다. Doorbell은 engine에 따라 32-bit 또는 64-bit이고, 4K page는 최대 512 user queue를 위한 512개의 64-bit doorbell을 제공합니다. 각 page 일부는 device가 지원하는 IP type별로 예약되며 INFO IOCTL로 range를 조회합니다.

Theory of Operation
===================

The various engines on modern AMD GPUs support multiple queues per engine with a
scheduling firmware which handles dynamically scheduling user queues on the
available hardware queue slots.  When the number of user queues outnumbers the
available hardware queue slots, the scheduling firmware dynamically maps and
unmaps queues based on priority and time quanta.  The state of each user queue
is managed in the kernel driver in an MQD (Memory Queue Descriptor).  This is a
buffer in GPU accessible memory that stores the state of a user queue.  The
scheduling firmware uses the MQD to load the queue state into an HQD (Hardware
Queue Descriptor) when a user queue is mapped.  Each user queue requires a
number of additional buffers which represent the ring buffer and any metadata
needed by the engine for runtime operation.  On most engines this consists of
the ring buffer itself, a rptr buffer (where the firmware will shadow the rptr
to userspace), a wptr buffer (where the application will write the wptr for the
firmware to fetch it), and a doorbell.  A doorbell is a piece of one of the
device's MMIO BARs which can be mapped to specific user queues.  When the
application writes to the doorbell, it will signal the firmware to take some
action. Writing to the doorbell wakes the firmware and causes it to fetch the
wptr and start processing the packets in the queue. Each 4K page of the doorbell
BAR supports specific offset ranges for specific engines.  The doorbell of a
queue must be mapped into the aperture aligned to the IP used by the queue
(e.g., GFX, VCN, SDMA, etc.).  These doorbell apertures are set up via NBIO
registers.  Doorbells are 32 bit or 64 bit (depending on the engine) chunks of
the doorbell BAR.  A 4K doorbell page provides 512 64-bit doorbells for up to
512 user queues.  A subset of each page is reserved for each IP type supported
on the device.  The user can query the doorbell ranges for each IP via the INFO
IOCTL.  See the IOCTL Interfaces section for more information.

Queue 생성·해제와 aggregated doorbell

Application은 user queue를 만들 때 ring buffer, wptr, rptr, context save area 등 필요한 buffer를 할당합니다. 각각 별도 buffer로 두거나 하나의 큰 buffer 일부로 둘 수 있습니다. Buffer를 자신의 GPUVM에 mapping하고 user queue memory area의 GPU virtual address를 사용하며, user queue용 doorbell page도 할당합니다.

Application은 USERQ IOCTL structure의 MQD에 GPU virtual address와 doorbell index를 채웁니다. Priority, protected content용 secure queue 여부 등의 attribute도 지정할 수 있습니다. USERQ CREATE IOCTL을 호출하면 kernel driver가 application MQD를 검증하고 IP별 MQD 형식으로 변환합니다. IP-specific MQD를 할당하고 scheduling firmware의 run list에 queue를 추가합니다.

생성 후 application은 queue에 packet을 직접 쓰고 wptr을 갱신한 다음 doorbell offset에 써서 work를 시작합니다. 사용을 마치면 USERQ FREE IOCTL을 호출합니다. Kernel driver는 queue를 preempt하고 firmware run list에서 제거한 뒤 IP-specific MQD를 해제하고 user queue state를 정리합니다.

일부 engine은 unmapped queue의 doorbell을 지원하지 않아 aggregated doorbell이 필요할 수 있습니다. Oversubscription으로 queue가 mapping되지 않은 상태에서 doorbell을 울리면 engine firmware가 요청을 놓칠 수 있습니다. Firmware의 wptr shadow polling이나 unmapped queue doorbell update 지원이 없다면 kernel driver가 각 GPUVM에 aggregated doorbell page를 mapping합니다. UMD는 일반 doorbell과 wptr을 갱신한 뒤 aggregated doorbell에도 씁니다.

When an application wants to create a user queue, it allocates the necessary
buffers for the queue (ring buffer, wptr and rptr, context save areas, etc.).
These can be separate buffers or all part of one larger buffer.  The application
would map the buffer(s) into its GPUVM and use the GPU virtual addresses of for
the areas of memory they want to use for the user queue.  They would also
allocate a doorbell page for the doorbells used by the user queues.  The
application would then populate the MQD in the USERQ IOCTL structure with the
GPU virtual addresses and doorbell index they want to use.  The user can also
specify the attributes for the user queue (priority, whether the queue is secure
for protected content, etc.).  The application would then call the USERQ
CREATE IOCTL to create the queue using the specified MQD details in the IOCTL.
The kernel driver then validates the MQD provided by the application and
translates the MQD into the engine specific MQD format for the IP.  The IP
specific MQD would be allocated and the queue would be added to the run list
maintained by the scheduling firmware.  Once the queue has been created, the
application can write packets directly into the queue, update the wptr, and
write to the doorbell offset to kick off work in the user queue.

When the application is done with the user queue, it would call the USERQ
FREE IOCTL to destroy it.  The kernel driver would preempt the queue and
remove it from the scheduling firmware's run list.  Then the IP specific MQD
would be freed and the user queue state would be cleaned up.

Some engines may require the aggregated doorbell too if the engine does not
support doorbells from unmapped queues.  The aggregated doorbell is a special
page of doorbell space which wakes the scheduler.  In cases where the engine may
be oversubscribed, some queues may not be mapped.  If the doorbell is rung when
the queue is not mapped, the engine firmware may miss the request.  Some
scheduling firmware may work around this by polling wptr shadows when the
hardware is oversubscribed, other engines may support doorbell updates from
unmapped queues.  In the event that one of these options is not available, the
kernel driver will map a page of aggregated doorbell space into each GPUVM
space.  The UMD will then update the doorbell and wptr as normal and then write
to the aggregated doorbell as well.

Protected fence packet

Legacy implicit synchronization과 user queue·kernel queue 혼합을 지원하려면 안전한 synchronization mechanism이 필요합니다. Kernel queue와 memory management task는 kernel fence에 의존하므로, 악의적인 주체가 조작할 수 없는 memory를 user queue가 kernel fence용으로 갱신할 방법이 필요합니다.

Protected fence packet은 write 권한이 privileged client에만 있는 memory location에 단조 증가 값을 기록합니다. User queue에는 read 권한만 있습니다. Packet이 실행되면 memory location이 갱신되고 다른 kernel 또는 user queue가 결과를 볼 수 있습니다.

User application이 command stream에 packet을 제출합니다. 실제 packet 형식은 IP(GFX/Compute, SDMA, VCN 등)마다 다르지만 동작은 같습니다. 제출은 userspace가 처리하고, kernel driver는 application이 queue를 만들 때 각 user queue용 privileged memory를 설정합니다.

Special Packets
---------------

In order to support legacy implicit synchronization, as well as mixed user and
kernel queues, we need a synchronization mechanism that is secure.  Because
kernel queues or memory management tasks depend on kernel fences, we need a way
for user queues to update memory that the kernel can use for a fence, that can't
be messed with by a bad actor.  To support this, we've added a protected fence
packet.  This packet works by writing a monotonically increasing value to
a memory location that only privileged clients have write access to. User
queues only have read access.  When this packet is executed, the memory location
is updated and other queues (kernel or user) can see the results.  The
user application would submit this packet in their command stream.  The actual
packet format varies from IP to IP (GFX/Compute, SDMA, VCN, etc.), but the
behavior is the same.  The packet submission is handled in userspace.  The
kernel driver sets up the privileged memory used for each user queue when it
sets the queues up when the application creates them.

Memory management와 kernel queue 공존

GPU engine이 실행 중일 때 process의 GPUVM space에 mapping된 모든 buffer가 유효하다고 가정합니다. Kernel driver는 모든 buffer가 mapping되어 있을 때만 user queue 실행을 허용합니다.

Buffer migration이 필요한 memory event가 발생하면 kernel driver가 user queue를 preempt하고 buffer를 필요한 위치로 이동합니다. 이어서 GPUVM page table을 갱신하고 TLB를 invalidate한 뒤 user queue를 resume합니다.

IP와 scheduling firmware에 따라 kernel queue와 user queue를 동시에 활성화할 수 있지만 HQD slot 수의 제한을 받습니다. Kernel queue는 항상 mapping되어 그쪽 work가 우선하며, 그만큼 user queue가 사용할 HQD slot이 줄어듭니다.

모든 GPU의 모든 IP가 user queue를 지원하는 것은 아닙니다. 예를 들어 GFX, compute, SDMA는 지원하지만 VCN, JPEG, VPE는 지원하지 않을 수 있습니다. UMD는 IP별로 두 queue 모델을 모두 지원해야 하며 INFO IOCTL로 각 IP의 지원 여부를 조회해 선택합니다.

Memory Management
=================

It is assumed that all buffers mapped into the GPUVM space for the process are
valid when engines on the GPU are running.  The kernel driver will only allow
user queues to run when all buffers are mapped.  If there is a memory event that
requires buffer migration, the kernel driver will preempt the user queues,
migrate buffers to where they need to be, update the GPUVM page tables and
invaldidate the TLB, and then resume the user queues.

Interaction with Kernel Queues
==============================

Depending on the IP and the scheduling firmware, you can enable kernel queues
and user queues at the same time, however, you are limited by the HQD slots.
Kernel queues are always mapped so any work that goes into kernel queues will
take priority.  This limits the available HQD slots for user queues.

Not all IPs will support user queues on all GPUs.  As such, UMDs will need to
support both user queues and kernel queues depending on the IP.  For example, a
GPU may support user queues for GFX, compute, and SDMA, but not for VCN, JPEG,
and VPE.  UMDs need to support both.  The kernel driver provides a way to
determine if user queues and kernel queues are supported on a per IP basis.
UMDs can query this information via the INFO IOCTL and determine whether to use
kernel queues or user queues for each IP.

Queue reset과 주소 검증

대부분의 engine에서 queue를 개별 reset할 수 있으며 GFX, compute, SDMA queue가 이에 해당합니다. Hung queue를 감지하면 scheduling firmware 또는 MMIO로 reset할 수 있습니다.

대부분의 user queue에는 kernel fence가 없으므로 보통 buffer migration을 요구하는 memory event 같은 다른 사건이 생길 때 hung 상태가 드러납니다. Queue preemption이 실패하면 driver가 preempt 실패 queue를 찾아 reset하고 어떤 queue가 hung인지 기록합니다.

UMD는 USERQ QUERY_STATUS IOCTL에 queue id를 제공해 상태를 조회합니다. Kernel driver는 failed preemption 등으로 이미 hung으로 기록했는지 확인해 상태를 돌려줍니다.

Queue 및 rptr, wptr, context save area 등에 사용하는 GPU virtual address는 kernel mode driver가 검증해야 합니다. Invalid GPU virtual address 또는 doorbell index를 주면 IOCTL이 error를 반환해야 합니다. Buffer도 kernel driver가 추적하므로 GPUVM에서 unmap하려는 호출은 error를 반환합니다.

Queue Resets
============

For most engines, queues can be reset individually.  GFX, compute, and SDMA
queues can be reset individually.  When a hung queue is detected, it can be
reset either via the scheduling firmware or MMIO.  Since there are no kernel
fences for most user queues, they will usually only be detected when some other
event happens; e.g., a memory event which requires migration of buffers.  When
the queues are preempted, if the queue is hung, the preemption will fail.
Driver will then look up the queues that failed to preempt and reset them and
record which queues are hung.

On the UMD side, we will add a USERQ QUERY_STATUS IOCTL to query the queue
status.  UMD will provide the queue id in the IOCTL and the kernel driver
will check if it has already recorded the queue as hung (e.g., due to failed
peemption) and report back the status.

IOCTL Interfaces
================

GPU virtual addresses used for queues and related data (rptrs, wptrs, context
save areas, etc.) should be validated by the kernel mode driver to prevent the
user from specifying invalid GPU virtual addresses.  If the user provides
invalid GPU virtual addresses or doorbell indicies, the IOCTL should return an
error message.  These buffers should also be tracked in the kernel driver so
that if the user attempts to unmap the buffer(s) from the GPUVM, the umap call
would return an error.

INFO·USERQ IOCTL과 queue mode

새 INFO query는 user queue metadata(context save area, shadow buffer 등)의 필요한 크기, IP type별 kernel/user queue 지원 여부, doorbell page 안의 IP type별 offset을 조회합니다.

USERQ IOCTL은 user queue 생성·해제·상태 조회에 사용되며 세 opcode를 지원합니다. CREATE는 queue type과 metadata·flag를 정의하는 MQD-like structure를 받고 queue id를 반환합니다. FREE는 queue를 해제합니다. QUERY_STATUS는 queue가 healthy한지, 예를 들어 reset됐는지를 조회하며 원문에서 WIP로 표시됩니다.

USERQ_SIGNAL IOCTL은 signal할 sync object 목록을 제공하고, USERQ_WAIT IOCTL은 기다릴 sync object 목록을 제공합니다.

성능 검증과 시험을 위해 `user_queue` driver parameter로 활성화할 queue type을 선택합니다. `0`은 kernel queue만, `1`은 user와 kernel queue 모두, `2`는 user queue만 활성화합니다.

User queue only 모드는 scheduling firmware가 사용하도록 기존 static kernel queue assignment를 비웁니다. 다만 kernel driver 동작에 필요한 일부 kernel queue는 항상 생성됩니다. Kernel queue가 활성화되지 않으면 drm scheduler에 등록되지 않고 CS IOCTL은 그 queue type을 대상으로 하는 command submission을 거부합니다. Kernel queue only는 기존 모든 GPU의 동작을 재현하며, 두 종류 모두 활성화하면 과거 userspace 호환성과 user queue 지원을 함께 제공합니다.

INFO
----
There are several new INFO queries related to user queues in order to query the
size of user queue meta data needed for a user queue (e.g., context save areas
or shadow buffers), whether kernel or user queues or both are supported
for each IP type, and the offsets for each IP type in each doorbell page.

USERQ
-----
The USERQ IOCTL is used for creating, freeing, and querying the status of user
queues.  It supports 3 opcodes:

1. CREATE - Create a user queue.  The application provides an MQD-like structure
   that defines the type of queue and associated metadata and flags for that
   queue type.  Returns the queue id.
2. FREE - Free a user queue.
3. QUERY_STATUS - Query that status of a queue.  Used to check if the queue is
   healthy or not.  E.g., if the queue has been reset. (WIP)

USERQ_SIGNAL
------------
The USERQ_SIGNAL IOCTL is used to provide a list of sync objects to be signaled.

USERQ_WAIT
----------
The USERQ_WAIT IOCTL is used to provide a list of sync object to be waited on.

Kernel and User Queues
======================

In order to properly validate and test performance, we have a driver option to
select what type of queues are enabled (kernel queues, user queues or both).
The user_queue driver parameter allows you to enable kernel queues only (0),
user queues and kernel queues (1), and user queues only (2).  Enabling user
queues only will free up static queue assignments that would otherwise be used
by kernel queues for use by the scheduling firmware.  Some kernel queues are
required for kernel driver operation and they will always be created.  When the
kernel queues are not enabled, they are not registered with the drm scheduler
and the CS IOCTL will reject any incoming command submissions which target those
queue types.  Kernel queues only mirrors the behavior on all existing GPUs.
Enabling both queues allows for backwards compatibility with old userspace while
still supporting user queues.