Part 1
요약·해설
공식 원문 260줄과 property 16행을 전수 대조해 JEDEC/SFDP discovery·4-byte addressing·protection·deep-power-down timing 제약을 보존했습니다.
andestech,qspi-nor
Andes Technology Corporation
16 rows
Andes QSPI NOR geometry/SFDP/power-state options
Part 2
접을 수 있는 영어 원문 전체
영어 원문 전체 펼치기
CA1F63C32175F2F576302BA7663A7271F7D43F42F8D08F3DF3F45BFA63885BCF
:orphan:
.. raw:: html
<!--
FIXME: do not limit page width until content uses another representation
format other than tables
-->
<style>.wy-nav-content { max-width: none; !important }</style>
.. dtcompatible:: andestech,qspi-nor
.. _dtbinding_andestech_qspi_nor:
andestech,qspi-nor
##################
Vendor: :ref:`Andes Technology Corporation <dt_vendor_andestech>`
Description
***********
.. code-block:: none
Properties supporting Zephyr qspi-nor flash driver control of flash memories using the standard M25P80-based command set.
Properties
**********
.. tabs::
.. group-tab:: Node specific properties
Properties not inherited from the base binding file.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``jedec-id``
- ``uint8-array``
- .. code-block:: none
JEDEC ID as manufacturer ID, memory type, memory density
* - ``size``
- ``int``
- .. code-block:: none
flash capacity in bits
* - ``sfdp-bfp``
- ``uint8-array``
- .. code-block:: none
Contains the 32-bit words in little-endian byte order from the
JESD216 Serial Flash Discoverable Parameters Basic Flash
Parameters table. This provides flash-specific configuration
information in cases were runtime retrieval of SFDP data
is not desired.
* - ``quad-enable-requirements``
- ``string``
- .. code-block:: none
Quad Enable Requirements value from JESD216 BFP DW15.
Use NONE if the device detects 1-1-4 and 1-4-4 modes by the
instruction. Use S1B6 if QE is bit 6 of the first status register
byte, and can be configured by reading then writing one byte with
RDSR and WRSR. For other fields see the specification.
Legal values: ``'NONE'``, ``'S2B1v1'``, ``'S1B6'``, ``'S2B7'``, ``'S2B1v4'``, ``'S2B1v5'``, ``'S2B1v6'``
* - ``enter-4byte-addr``
- ``int``
- .. code-block:: none
Enter 4-Byte Addressing value from JESD216 BFP DW16
This property is ignored if the device is configured to use SFDP data
from the sfdp-bfp property (CONFIG_SPI_NOR_SFDP_DEVICETREE) or to read
SFDP properties at runtime (CONFIG_SPI_NOR_SFDP_RUNTIME).
For CONFIG_SPI_NOR_SFDP_MINIMAL this is the 8-bit value from bits 31:24
of DW16 identifying ways a device can be placed into 4-byte addressing
mode. If provided as a non-zero value the driver assumes that 4-byte
addressing is require to access the full address range, and
automatically puts the device into 4-byte address mode when the device
is initialized.
* - ``page-size``
- ``int``
- .. code-block:: none
Number of bytes in a page from JESD216 BFP DW11
This property is only used in the CONFIG_SPI_NOR_SFDP_MINIMAL configuration.
It is ignored if the device is configured to use SFDP data
from the sfdp-bfp property (CONFIG_SPI_NOR_SFDP_DEVICETREE) or
if the SFDP parameters are read from the device at
runtime (CONFIG_SPI_NOR_SFDP_RUNTIME).
The default value is 256 bytes if the value is not specified.
* - ``requires-ulbpr``
- ``boolean``
- .. code-block:: none
Indicates the device requires the ULBPR (0x98) command.
Some flash chips such as the Microchip SST26VF series have a block
protection register that initializes to write-protected. Use this
property to indicate that the BPR must be unlocked before write
operations can proceed.
* - ``has-dpd``
- ``boolean``
- .. code-block:: none
Indicates the device supports the DPD (0xB9) command.
Use this property to indicate the flash chip supports the Deep
Power-Down mode that is entered by command 0xB9 to reduce power
consumption below normal standby levels. Use of this property
implies that the RDPD (0xAB) Release from Deep Power Down command
is also supported. (On some chips this command functions as Read
Electronic Signature; see t-enter-dpd).
* - ``dpd-wakeup-sequence``
- ``array``
- .. code-block:: none
Specifies wakeup durations for devices without RDPD.
Some devices (Macronix MX25R in particular) wake from deep power
down by a timed sequence of CSn toggles rather than the RDPD
command. This property specifies three durations measured in
nanoseconds, in this order:
(1) tDPDD (Delay Time for Release from Deep Power-Down Mode)
(2) tCDRP (CSn Toggling Time before Release from Deep Power-Down Mode)
(3) tRDP (Recovery Time for Release from Deep Power-Down Mode)
Absence of this property indicates that the RDPD command should be
used to wake the chip from Deep Power-Down mode.
* - ``t-enter-dpd``
- ``int``
- .. code-block:: none
Duration required to complete the DPD command.
This provides the duration, in nanoseconds, that CSn must be
remain deasserted after issuing DPD before the chip will enter
deep power down.
If not provided the driver does not enforce a delay.
* - ``t-exit-dpd``
- ``int``
- .. code-block:: none
Duration required to complete the RDPD command.
This provides the duration, in nanoseconds, that CSn must be
remain deasserted after issuing RDPD before the chip will exit
deep power down and be ready to receive additional commands.
If not provided the driver does not enforce a delay.
* - ``has-lock``
- ``int``
- .. code-block:: none
Bit mask of bits of the status register that should be cleared on
startup.
Some devices from certain vendors power-up with block protect bits
set in the status register, which prevent any erase or program
operation from working. Devices that have this behavior need to
clear those bits on startup. However, other devices have
non-volatile bits in the status register that should not be
cleared.
This value, when present, identifies bits in the status register
that should be cleared when the device is initialized.
* - ``mxicy,mx25r-power-mode``
- ``string``
- .. code-block:: none
Select to configure flash to use ultra low power mode or high performance mode (L/H switch). The high performance mode has faster write and erase performance, but use more power than ultra low power mode.
Only supported on Macronix MX25R Ultra Low Power series.
Legal values: ``'low-power'``, ``'high-performance'``
* - ``wp-gpios``
- ``phandle-array``
- .. code-block:: none
WPn pin
* - ``hold-gpios``
- ``phandle-array``
- .. code-block:: none
HOLDn pin
* - ``reset-gpios``
- ``phandle-array``
- .. code-block:: none
RESETn pin
.. group-tab:: Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
.. group-tab:: Base properties
Properties inherited from the base binding file, which defines
common properties that may be set on many nodes. Not all of these
may apply to the "andestech,qspi-nor" compatible.
(None)
Part 3
한국어 전문 번역
andestech,qspi-nor
Vendor: Andes Technology Corporation
공식 설명
Properties supporting Zephyr qspi-nor flash driver control of flash memories using the standard M25P80-based command set.M25P80 계열 command set의 QSPI NOR
jedec-id는 manufacturer/type/density, size는 bit 단위 capacity입니다. sfdp-bfp는 runtime SFDP 조회 대신 JESD216 BFP word를 little-endian byte로 제공합니다. Minimal SFDP mode에서는 4-byte address 진입 방식과 page size를 직접 줄 수 있으며 page 기본값은 256 byte입니다.
Protection과 low-power
requires-ulbpr: 0x98 ULBPR로 power-up protection 해제has-lock: 초기화 때 지울 status-register bit maskhas-dpd: 0xB9 DPD와 0xAB release 지원dpd-wakeup-sequence: RDPD 없이 CSn toggle을 쓰는 device의 tDPDD·tCDRP·tRDPt-enter-dpd·t-exit-dpd: nanosecond 단위 대기
wp-gpios, hold-gpios, reset-gpios는 각 WPn/HOLDn/RESETn pin입니다. 이 공식 page에는 base property 표와 필수 표기가 없으므로 compatible·reg를 임의로 추가하지 않았습니다.
속성 전체 번역
공식 page의 node property 16개를 모두 번역했으며 base property 표는 없습니다.
노드 전용 속성 · 16개
| 이름 | 형식 | 설명과 제약 |
|---|---|---|
jedec-id | uint8-array | Manufacturer ID·memory type·memory density 순서의 JEDEC ID byte 배열입니다. |
size | int | Flash capacity이며 bit 단위입니다. |
sfdp-bfp | uint8-array | JESD216 SFDP Basic Flash Parameters table의 32-bit word를 little-endian byte 순서로 담습니다. Runtime SFDP 조회를 원하지 않을 때 device별 정보를 제공합니다. |
quad-enable-requirements | string | JESD216 BFP DW15의 Quad Enable Requirements 값입니다. Instruction 자체가 1-1-4/1-4-4를 구분하면 NONE을 사용하고 나머지는 QE bit 위치·쓰기 절차에 맞는 값을 선택합니다. 허용값: 'NONE', 'S2B1v1', 'S1B6', 'S2B7', 'S2B1v4', 'S2B1v5', 'S2B1v6' |
enter-4byte-addr | int | JESD216 BFP DW16의 4-byte addressing 진입 방식 값입니다. SFDP를 devicetree 또는 runtime에서 얻는 구성에서는 무시되고 minimal 구성에서 사용됩니다. |
page-size | int | JESD216 BFP DW11의 page byte 수입니다. SFDP minimal 구성에서만 사용하며 생략 시 기본값은 256 byte입니다. |
requires-ulbpr | boolean | Write 전에 ULBPR(0x98) command로 Block Protection Register를 unlock해야 하는 flash임을 나타냅니다. |
has-dpd | boolean | Flash가 DPD(0xB9) Deep Power-Down command와 RDPD(0xAB) release command를 지원함을 나타냅니다. |
dpd-wakeup-sequence | array | RDPD command 없이 CSn toggle로 Deep Power-Down에서 깨우는 device의 tDPDD·tCDRP·tRDP 시간을 nanosecond 단위로 담은 배열입니다. |
t-enter-dpd | int | DPD command 뒤 flash가 Deep Power-Down에 들어갈 때까지 CSn을 deassert해야 하는 시간이며 nanosecond 단위입니다. |
t-exit-dpd | int | RDPD command 뒤 flash가 다음 command를 받을 수 있을 때까지 CSn을 deassert해야 하는 시간이며 nanosecond 단위입니다. |
has-lock | int | 초기화 때 지울 status register bit를 지정하는 mask입니다. Power-up block-protect bit를 해제하는 데 사용합니다. |
mxicy,mx25r-power-mode | string | Macronix MX25R Ultra Low Power series의 low-power 또는 high-performance mode를 선택합니다. 허용값: 'low-power', 'high-performance' |
wp-gpios | phandle-array | Storage device의 write-protect pin에 연결하는 GPIO specifier입니다. Active level은 해당 binding 설명과 board wiring을 따릅니다. |
hold-gpios | phandle-array | Serial flash의 HOLDn pin에 연결하는 GPIO specifier입니다. |
reset-gpios | phandle-array | Serial flash의 RESETn pin에 연결하는 GPIO specifier입니다. |
Source
출처
영어 원문에는 문단, 문서 지시문, 표, 코드, 코드 심벌, 경로를 그대로 보존했습니다.