Part 1
요약·해설
공식 원문 771줄과 property 70행을 전수 대조해 clock/MDIO·DMA buffer·offload·frame filtering 제약을 보존했습니다.
xlnx,gem
Xilinx
70 rows
GEM MAC + MDIO + DMA
Part 2
접을 수 있는 영어 원문 전체
영어 원문 전체 펼치기
55E04BA989AB829727BD3767C0E4D79D66ABB78050042D12E9470260F88ED1B8
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.. dtcompatible:: xlnx,gem
.. _dtbinding_xlnx_gem:
xlnx,gem
########
Vendor: :ref:`Xilinx <dt_vendor_xlnx>`
Description
***********
.. code-block:: none
Xilinx GEM Ethernet controller
Properties
**********
.. tabs::
.. group-tab:: Node specific properties
Properties not inherited from the base binding file.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``local-mac-address``
- ``uint8-array``
- .. code-block:: none
Specifies the MAC address that was assigned to the network device
* - ``zephyr,random-mac-address``
- ``boolean``
- .. code-block:: none
Use a random MAC address generated when the driver is initialized.
Note that using this choice and rebooting a board may leave stale
MAC address in peers' ARP caches and lead to issues and delays in
communication. (Use "ip neigh flush all" on Linux peers to clear
ARP cache.)
It is driver specific how the OUI octets are handled.
If set we ignore any setting of the local-mac-address property.
* - ``phy-handle``
- ``phandle``
- .. code-block:: none
Specifies a reference to a node representing a PHY device.
* - ``phy-connection-type``
- ``string``
- .. code-block:: none
Specifies the interface connection type between ethernet MAC and PHY.
Legal values: ``'mii'``, ``'rmii'``, ``'gmii'``, ``'rgmii'``
* - ``clock-frequency``
- ``int``
- .. code-block:: none
Specifies the base clock frequency from which the GEM's TX clock
frequency will be derived using two dividers in the respective GEM's
clock control register in the CRL_APB. The GEM's TX clock frequency
is determined by the current link speed reported by the PHY, to
which it will be adjusted at run-time. Therefore, the value of this
item must be set to the clock frequency of the PLL supplying the
respective GEM's TX clock - by default, this is the IO PLL.
This property is **required**.
* - ``mdc-divider``
- ``int``
- .. code-block:: none
The MDC clock divider for the respective GEM. This is the divider
applied to the LPD_LSBUS clock in order to derive MDIO interface
clock driving communications with the attached PHY. Refer to the
ZynqMP register documentation (ug1087), network_config (GEM) Register
Description, bits [20:18] to determine the appropriate divider for
the current target's LPD LSBUS clock frequency.
This property is **required**.
* - ``init-mdio-phy``
- ``boolean``
- .. code-block:: none
Activates the management of a PHY associated with the controller in-
stance. If this parameter is activated at the board level, the de-
fault values of the associated parameters mdio-phy-address, phy-poll-
interval, link-speed and advertise-lower-link-speeds should be checked
and overwritten at the board level if required.
* - ``mdio-phy-address``
- ``int``
- .. code-block:: none
The address on the MDIO bus of the PHY associated with the controller
instance. Set the address to 0 for auto-detection (first responding
PHY will be claimed by the driver, watch out in case of shared MDIO
use), or to a fixed address between 1 and 32.
This property is **required**.
* - ``phy-poll-interval``
- ``int``
- .. code-block:: none
PHY status polling interval in milliseconds for a driver instance
managing an associated PHY.
This property is **required**.
* - ``link-speed``
- ``int``
- .. code-block:: none
Nominal link speed. If no PHY is managed by an instance of this driver,
the respective controller will be configured to match the link speed
specified here. If a PHY is managed by the driver, advertisement of
the link speed specified here will be requested. If the optional pro-
perty advertise-lower-link-speeds is set, advertisement of the link
speed specified here plus any valid link speed below this value will
be requested.
This property is **required**.
Legal values: ``1``, ``2``, ``3``
* - ``advertise-lower-link-speeds``
- ``boolean``
- .. code-block:: none
Indicates to a driver instance which manages an associated PHY on
the MDIO bus to include link speeds lower than the nominal value
set in the link-speed property in the advertisement when requesting
link speed auto-negotiation with a peer system.
* - ``handle-rx-in-isr``
- ``boolean``
- .. code-block:: none
Moves the handling of the frame received interrupt including the
transfer of packet data from the DMA to network packet buffers and
the subsequent propagation of the received packets to the network
stack into the context of the ISR. Due to the unpredictability of
the runtime of the ISR whenever large amounts of data are received,
handling of the RX interrupt is normally deferred to the context
of the system work queue.
* - ``handle-tx-in-workq``
- ``boolean``
- .. code-block:: none
Moves the handling of the frame transmission done interrupt into the
context of the system work queue. By default, TX done handling is per-
formed in the context of the ISR, as it only involves a limited number
of memory accesses. This option CAN NOT be used if any component ex-
ists within the current system setup that triggers the transmission
of packets from within the context of the system work queue!
* - ``amba-ahb-dbus-width``
- ``int``
- .. code-block:: none
AMBA AHB data bus width.
This property is **required**.
Legal values: ``0``, ``1``, ``2``
* - ``amba-ahb-burst-length``
- ``int``
- .. code-block:: none
AMBA AHB burst length for DMA operations.
This property is **required**.
Legal values: ``1``, ``4``, ``8``, ``16``
* - ``hw-rx-buffer-size``
- ``int``
- .. code-block:: none
Hardware RX buffer size, scalable between 1 kB and 8 kB, where the full
8 kB should be the default.
This property is **required**.
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``hw-rx-buffer-offset``
- ``int``
- .. code-block:: none
Data offset in the hardware RX packet buffer (in bytes). Valid range is
0-3 bytes.
This property is **required**.
* - ``hw-tx-buffer-size-full``
- ``boolean``
- .. code-block:: none
When set, the hardware TX data buffer will make use of the full 4 kB
that are available. If unset, the hardware TX data buffer will be
limited to 2 kB.
* - ``rx-buffer-descriptors``
- ``int``
- .. code-block:: none
The number of descriptors to be allocated in the RX buffer descriptor
ring. Must be <= 255.
This property is **required**.
* - ``rx-buffer-size``
- ``int``
- .. code-block:: none
The size of each receive data buffer, must be a multiple of 8, highest
valid value is 16320, values less than 64 are not really useful.
This property is **required**.
* - ``tx-buffer-descriptors``
- ``int``
- .. code-block:: none
The number of descriptors to be allocated in the TX buffer descriptor
ring. Must be <= 255.
This property is **required**.
* - ``tx-buffer-size``
- ``int``
- .. code-block:: none
The size of each transmit data buffer, highest valid value is 16380,
values less than 64 are not really useful.
This property is **required**.
* - ``ignore-ipg-rxer``
- ``boolean``
- .. code-block:: none
Optional feature flag - Ignore IPG rx_er. When set, rx_er has no
effect on the GEM's operation when rx_dv is low. Set this when using
the RGMII wrapper in half-duplex mode.
* - ``disable-reject-nsp``
- ``boolean``
- .. code-block:: none
Optional feature flag - Receive bad preamble. When set, frames with
non-standard preamble will not be rejected.
* - ``ipg-stretch``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable IPG stretch. When set, the transmit
IPG can be increased above 96 bit times depending on the previous
frame length using the IPG stretch register.
* - ``sgmii-mode``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable SGMII mode. Changes the behaviour of
the auto-negotiation advertisement and link partner ability registers
to meet the requirements of SGMII and reduces the duration of the link
timer from 10 ms to 1.6 ms.
* - ``disable-reject-fcs-crc-errors``
- ``boolean``
- .. code-block:: none
Optional feature flag - Disable rejection of FCS/CRC errors.
When set, frames with FCS/CRC errors will not be rejected. FCS error
statistics will still be collected for frames with bad FCS and FCS
status will be recorded in the frame's DMA descriptor. This option
should not be activated for normal operation.
* - ``rx-halfdup-while-tx``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable frames to be received in half-duplex
mode while transmitting.
* - ``rx-checksum-offload``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable RX IP/TCP/UDP checksum offload to
hardware. Frames with bad IP, TCP or UDP checksums will be discarded.
This option is NOT supported by the QEMU implementation of the GEM!
* - ``tx-checksum-offload``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable TX IP/TCP/UDP checksum offload to
hardware. This option is NOT supported by the QEMU implementation
of the GEM!
* - ``disable-pause-copy``
- ``boolean``
- .. code-block:: none
Optional feature flag - Do not copy received pause frames to memory.
Set this option in order to prevent valid pause frames from being
copied to memory. When set, pause frames are not copied to memory
regardless of the state of the copy all frames bit, whether a hash
match is found or whether a type ID match is identified. If a desti-
nation address match is found the pause frame will be copied to
memory. Note that valid pause frames received will still increment
pause statistics and pause the transmission of frames as required.
* - ``discard-rx-fcs``
- ``boolean``
- .. code-block:: none
Optional feature flag - Remove FCS of received frames.
When set, received frames will be written to memory without their
frame check sequence (last 4 bytes). The frame length indicated will
be reduced by four bytes in this mode.
* - ``discard-rx-length-errors``
- ``boolean``
- .. code-block:: none
Optional feature flag - Discard frames with length field errors.
When set, frames with a measured length shorter than the extracted
length field (as indicated by bytes 13 and 14 in a non-VLAN tagged
frame) will be discarded. This only applies to frames with a length
field less than 0x0600.
* - ``pause-frame``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable pause. When set, transmission will
pause if a non zero 802.3 classic pause frame is received and PFC
has not been negotiated.
* - ``tbi``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable TBI. When set, the TBI interface is en-
bled instead of the GMII/MII interface.
* - ``ext-address-match``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable external address match. When set, the
external address match interface can be used to copy frames to memory.
* - ``long-frame-rx-support``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable reception of 1536 byte frames.
Normally, the GEM rejects any frame above 1518 bytes.
* - ``unicast-hash``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable unicast hash. When set, unicast frames
will be accepted when the 6 bit hash function of the destination
address points to a bit that is set in the hash register.
* - ``multicast-hash``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable multicast hash. When set, multicast
frames will be accepted when the 6 bit hash function of the desti-
nation address points to a bit that is set in the hash register.
* - ``reject-broadcast``
- ``boolean``
- .. code-block:: none
Optional feature flag - Reject broadcast frames. When set, frames
addressed to the all-ones broadcast address will be rejected.
* - ``promiscuous-mode``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable promiscuous mode. When set, all valid
frames will be accepted.
* - ``discard-non-vlan``
- ``boolean``
- .. code-block:: none
Optional feature flag - Discard non-VLAN frames. When set, only VLAN tagged frames will be passed to the address matching logic.
* - ``full-duplex``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enables full duplex reception and transmission.
* - ``discard-rx-frame-ahb-unavail``
- ``boolean``
- .. code-block:: none
Optional feature flag - Discard received packets when no AHB resource
is available.
* - ``ahb-packet-endian-swap``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable AHB packet data endianness swap to big
endian. If this flag is not set, data will be little endian.
* - ``ahb-md-endian-swap``
- ``boolean``
- .. code-block:: none
Optional feature flag - Enable AHB management descriptor data endian-
ness swap to big endian. If this flag is not set, data will be little
endian.
.. group-tab:: Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
.. group-tab:: Base properties
Properties inherited from the base binding file, which defines
common properties that may be set on many nodes. Not all of these
may apply to the "xlnx,gem" compatible.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``wakeup-source``
- ``boolean``
- .. code-block:: none
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
* - ``power-domain``
- ``phandle``
- .. code-block:: none
Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
* - ``zephyr,pm-device-runtime-auto``
- ``boolean``
- .. code-block:: none
Automatically configure the device for runtime power management after the
init function runs.
* - ``zephyr,disabling-power-states``
- ``phandles``
- .. code-block:: none
List of power states that will disable this device power.
* - ``status``
- ``string``
- .. code-block:: none
indicates the operational status of a device
Legal values: ``'ok'``, ``'okay'``, ``'disabled'``, ``'reserved'``, ``'fail'``, ``'fail-sss'``
See :ref:`dt-important-props` for more information.
* - ``compatible``
- ``string-array``
- .. code-block:: none
compatible strings
This property is **required**.
See :ref:`dt-important-props` for more information.
* - ``reg``
- ``array``
- .. code-block:: none
register space
This property is **required**.
See :ref:`dt-important-props` for more information.
* - ``reg-names``
- ``string-array``
- .. code-block:: none
name of each register space
* - ``interrupts``
- ``array``
- .. code-block:: none
interrupts for device
This property is **required**.
See :ref:`dt-important-props` for more information.
* - ``interrupts-extended``
- ``compound``
- .. code-block:: none
extended interrupt specifier for device
* - ``interrupt-names``
- ``string-array``
- .. code-block:: none
name of each interrupt
* - ``interrupt-parent``
- ``phandle``
- .. code-block:: none
phandle to interrupt controller node
* - ``label``
- ``string``
- .. code-block:: none
Human readable string describing the device (used as device_get_binding() argument)
See :ref:`dt-important-props` for more information.
This property is **deprecated**.
* - ``clocks``
- ``phandle-array``
- .. code-block:: none
Clock gate information
* - ``clock-names``
- ``string-array``
- .. code-block:: none
name of each clock
* - ``#address-cells``
- ``int``
- .. code-block:: none
number of address cells in reg property
* - ``#size-cells``
- ``int``
- .. code-block:: none
number of size cells in reg property
* - ``dmas``
- ``phandle-array``
- .. code-block:: none
DMA channels specifiers
* - ``dma-names``
- ``string-array``
- .. code-block:: none
Provided names of DMA channel specifiers
* - ``io-channels``
- ``phandle-array``
- .. code-block:: none
IO channels specifiers
* - ``io-channel-names``
- ``string-array``
- .. code-block:: none
Provided names of IO channel specifiers
* - ``mboxes``
- ``phandle-array``
- .. code-block:: none
mailbox / IPM channels specifiers
* - ``mbox-names``
- ``string-array``
- .. code-block:: none
Provided names of mailbox / IPM channel specifiers
* - ``zephyr,deferred-init``
- ``boolean``
- .. code-block:: none
Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
Part 3
한국어 전문 번역
xlnx,gem
Vendor: Xilinx
공식 설명
Xilinx GEM Ethernet controllerXilinx GEM Ethernet controller
Base compatible·reg·interrupts와 clock/MDIO, link, AHB, RX/TX descriptor·buffer geometry 13개 node property가 필수입니다.
Clock·PHY·link
- clock-frequency: GEM TX clock divider에 공급되는 PLL base clock
- mdc-divider: LPD_LSBUS에서 MDIO clock 생성
- mdio-phy-address: 0은 응답하는 첫 PHY 자동 탐지, 공유 MDIO에서는 주의
- phy-poll-interval: millisecond 단위 status polling
- link-speed: 허용 encoding 1·2·3; 공식 page는 숫자별 speed mapping을 설명하지 않음
DMA buffer contract
- AHB bus width encoding 0·1·2, burst length 1·4·8·16
- Hardware RX buffer encoding 0~3과 byte offset 0~3
- RX/TX descriptor 수는 각각 255 이하
- RX buffer는 8-byte 배수·최대 16320, TX buffer는 최대 16380
- handle-rx-in-isr는 큰 RX load에서 ISR 시간이 예측 불가능해질 수 있음
- handle-tx-in-workq는 work queue 안에서 packet을 보내는 component가 있으면 사용할 수 없음
Frame filtering과 offload
FCS 처리, pause frame, VLAN·unicast/multicast hash·broadcast·promiscuous filter, checksum offload, SGMII/TBI, endian swap을 각각 독립 boolean으로 설정합니다. 공식 주의대로 CRC 오류 수신 허용은 정상 동작용이 아니며 RX/TX checksum offload는 QEMU GEM에서 지원되지 않습니다.
속성 전체 번역
공식 Zephyr 3.7.0 schema의 모든 property를 옮겼습니다. 형식, 필수 여부와 허용값을 원문에서 직접 추출해 pinctrl·SPI·clock·DMA buffer·frame filter 제약을 보존했습니다.
노드 전용 속성 · 46개
| 이름 | 형식 | 설명과 제약 |
|---|---|---|
local-mac-address | uint8-array | 해당 switch port에 할당된 MAC address를 담는 6-byte 배열입니다. |
zephyr,random-mac-address | boolean | Driver 초기화 때 임의 MAC address를 생성합니다. local-mac-address는 무시되며 reboot 뒤 peer ARP cache가 오래 남을 수 있습니다. |
phy-handle | phandle | Ethernet MAC에 연결된 PHY device node를 가리키는 phandle입니다. |
phy-connection-type | string | Ethernet MAC과 PHY 사이의 MII·RMII·GMII·RGMII interface 종류입니다. 허용값: 'mii', 'rmii', 'gmii', 'rgmii' |
clock-frequency | int | GEM TX clock divider에 공급되는 PLL base clock frequency입니다. 기본 source는 IO PLL입니다. 필수 |
mdc-divider | int | LPD_LSBUS clock에서 GEM MDIO management clock을 만드는 divider 값입니다. 필수 |
init-mdio-phy | boolean | GEM driver가 연결된 PHY를 초기화하고 관리하도록 합니다. |
mdio-phy-address | int | GEM에 연결된 PHY의 MDIO address입니다. 0이면 응답하는 첫 PHY를 자동 탐지합니다. 필수 |
phy-poll-interval | int | Driver가 PHY status를 확인할 polling interval이며 millisecond 단위입니다. 필수 |
link-speed | int | GEM nominal link speed입니다. PHY를 관리하면 advertisement 요청값, 관리하지 않으면 controller 고정값으로 사용합니다. 필수 · 허용값: 1, 2, 3 |
advertise-lower-link-speeds | boolean | Nominal link speed보다 낮은 유효 speed도 auto-negotiation advertisement에 포함합니다. |
handle-rx-in-isr | boolean | RX interrupt 처리와 DMA packet copy·network stack 전달을 ISR context에서 수행합니다. |
handle-tx-in-workq | boolean | TX completion interrupt 처리를 system work queue context로 옮깁니다. |
amba-ahb-dbus-width | int | GEM DMA가 사용하는 AMBA AHB data bus width encoding입니다. 필수 · 허용값: 0, 1, 2 |
amba-ahb-burst-length | int | GEM DMA operation의 AMBA AHB burst length입니다. 필수 · 허용값: 1, 4, 8, 16 |
hw-rx-buffer-size | int | Hardware RX buffer 크기를 1KB부터 8KB까지 선택하는 encoding입니다. 필수 · 허용값: 0, 1, 2, 3 |
hw-rx-buffer-offset | int | Hardware RX packet buffer의 data offset이며 0~3 byte입니다. 필수 |
hw-tx-buffer-size-full | boolean | Hardware TX data buffer를 2KB가 아닌 전체 4KB로 사용합니다. |
rx-buffer-descriptors | int | RX descriptor ring에 할당할 descriptor 수이며 255 이하여야 합니다. 필수 |
rx-buffer-size | int | RX data buffer 하나의 크기입니다. 8의 배수이고 최대 16320 byte입니다. 필수 |
tx-buffer-descriptors | int | TX descriptor ring에 할당할 descriptor 수이며 255 이하여야 합니다. 필수 |
tx-buffer-size | int | TX data buffer 하나의 크기이며 최대 16380 byte입니다. 필수 |
ignore-ipg-rxer | boolean | RX_DV가 low일 때 IPG 구간의 RX_ER를 무시합니다. |
disable-reject-nsp | boolean | 비표준 preamble frame을 거부하지 않습니다. |
ipg-stretch | boolean | 이전 frame 길이에 따라 transmit inter-packet gap을 96 bit-time보다 늘립니다. |
sgmii-mode | boolean | SGMII auto-negotiation register 동작과 1.6ms link timer를 사용합니다. |
disable-reject-fcs-crc-errors | boolean | FCS/CRC 오류 frame 거부를 비활성화합니다. 정상 동작에는 권장되지 않습니다. |
rx-halfdup-while-tx | boolean | Half-duplex 송신 중에도 frame 수신을 허용합니다. |
rx-checksum-offload | boolean | RX IP/TCP/UDP checksum을 hardware에서 검사하고 오류 frame을 버립니다. |
tx-checksum-offload | boolean | TX IP/TCP/UDP checksum 생성을 hardware에 맡깁니다. |
disable-pause-copy | boolean | 수신한 pause frame을 memory에 복사하지 않습니다. |
discard-rx-fcs | boolean | 수신 frame의 마지막 4-byte FCS를 제거하고 memory에 기록합니다. |
discard-rx-length-errors | boolean | Ethernet length field와 측정 길이가 맞지 않는 frame을 버립니다. |
pause-frame | boolean | 802.3 classic pause frame에 따른 transmission pause를 활성화합니다. |
tbi | boolean | GMII/MII 대신 Ten-Bit Interface(TBI)를 활성화합니다. |
ext-address-match | boolean | External address-match interface로 일치 frame을 memory에 복사할 수 있게 합니다. |
long-frame-rx-support | boolean | 기본 1518 byte보다 긴 1536-byte frame 수신을 허용합니다. |
unicast-hash | boolean | Destination address의 6-bit hash가 register와 일치하는 unicast frame을 받습니다. |
multicast-hash | boolean | Destination address의 6-bit hash가 register와 일치하는 multicast frame을 받습니다. |
reject-broadcast | boolean | All-ones broadcast address로 온 frame을 거부합니다. |
promiscuous-mode | boolean | 모든 유효 frame을 수신하는 promiscuous mode를 켭니다. |
discard-non-vlan | boolean | VLAN tag가 없는 frame을 address matching 전에 버립니다. |
full-duplex | boolean | Full-duplex 송신과 수신을 활성화합니다. |
discard-rx-frame-ahb-unavail | boolean | 사용 가능한 AHB resource가 없을 때 수신 packet을 버립니다. |
ahb-packet-endian-swap | boolean | AHB packet data byte order를 big-endian으로 바꿉니다. |
ahb-md-endian-swap | boolean | AHB management descriptor byte order를 big-endian으로 바꿉니다. |
Base binding property · 24개
공통 기본 바인딩에서 상속한 속성입니다. 이 compatible에서 사용하지 않는 속성도 공식 참조 문서에 실려 있으면 함께 표시합니다.
| 이름 | 형식 | 설명과 제약 |
|---|---|---|
wakeup-source | boolean | 이 장치를 시스템 깨우기에 사용할 수 있음을 나타냅니다. 이 속성이 있으면 깨우기 지원 플래그가 설정됩니다. 기본 상태에서는 장치의 인터럽트로 시스템을 깨우지 않으며, 실행 중에 깨우기 기능을 활성화할 수 있습니다. |
power-domain | phandle | 장치가 속한 전원 도메인의 phandle입니다. 해당 전원 도메인이 일시 중단되거나 다시 동작하면 장치에 알림이 전달됩니다. |
zephyr,pm-device-runtime-auto | boolean | 초기화 함수 실행 후 장치의 런타임 전원 관리를 자동으로 설정합니다. |
zephyr,disabling-power-states | phandles | 이 장치의 전원이 꺼지는 전원 상태 목록입니다. |
status | string | 장치의 동작 상태를 나타냅니다. 허용값: 'ok', 'okay', 'disabled', 'reserved', 'fail', 'fail-sss' |
compatible | string-array | 이 노드에 적용할 바인딩과 드라이버를 식별하는 compatible 문자열 목록입니다. 필수 |
reg | array | 장치 레지스터의 주소 범위를 지정합니다. 필수 |
reg-names | string-array | 각 register space의 이름입니다. |
interrupts | array | 장치에서 사용하는 인터럽트를 지정하는 목록입니다. 필수 |
interrupts-extended | compound | 인터럽트 컨트롤러의 phandle을 함께 지정하는 확장 형식의 인터럽트 명세입니다. |
interrupt-names | string-array | 각 interrupt의 이름입니다. |
interrupt-parent | phandle | 인터럽트 컨트롤러 노드를 가리키는 phandle입니다. |
label | string | 사람이 장치를 알아볼 수 있도록 붙이는 이름입니다. 과거에는 device_get_binding()의 인자로 사용했습니다. 사용 중단됨 |
clocks | phandle-array | 클록 게이트 또는 클록 공급원을 지정하는 phandle 배열입니다. |
clock-names | string-array | 각 clock의 이름입니다. |
#address-cells | int | 하위 노드의 reg 속성에서 주소를 나타내는 데 쓰는 셀 수입니다. |
#size-cells | int | 하위 노드의 reg 속성에서 크기를 나타내는 데 쓰는 셀 수입니다. |
dmas | phandle-array | DMA 채널을 지정하는 phandle 배열입니다. |
dma-names | string-array | 지정한 DMA 채널의 이름입니다. |
io-channels | phandle-array | I/O 채널을 지정하는 phandle 배열입니다. |
io-channel-names | string-array | 지정한 I/O 채널의 이름입니다. |
mboxes | phandle-array | 메일박스/IPM 채널을 지정하는 phandle 배열입니다. |
mbox-names | string-array | 지정한 메일박스/IPM 채널의 이름입니다. |
zephyr,deferred-init | boolean | 부팅할 때 장치를 자동으로 초기화하지 않습니다. 이후 device_init()를 호출해 직접 초기화해야 합니다. |
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