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Zephyr 3.7.0 · Boards · ST · STM32U5

ST Nucleo U575ZI Q

19.5µA/MHz Cortex-M33, ECC memory와 22개 communication interface를 확인합니다.

Official pathboards/st/nucleo_u575zi_q/doc/index.html
Source fileboards/st/nucleo_u575zi_q/doc/index.rst
Source versionZephyr 3.7.0
TranslationFull · reviewed

본문 기준: Zephyr 3.7.0 LTS3 · 이후 유지보수 패치는 별도입니다.

Part 1

요약·해설

지원표 14행, U5 security·ART·analog·graphics IP, 9 GPIO controller와 SB50 backup-SRAM 절차, 전체 flash/debug 명령을 번역했습니다.

MCU

STM32U575ZI

Flash

2MB ECC

SRAM

786KB / 722KB

Clock

160MHz

Part 2

접을 수 있는 영어 원문 전체

영어 원문 전체 펼치기
원문 SHA-256 A1C56F5CFECA40C13B8DD18B0C572670964B329B82FEA149D4FEED8639F6EAC4
.. _nucleo_u575zi_q_board:

ST Nucleo U575ZI Q
##################

Overview
********

The Nucleo U575ZI Q board, featuring an ARM Cortex-M33 based STM32U575ZI MCU,
provides an affordable and flexible way for users to try out new concepts and
build prototypes by choosing from the various combinations of performance and
power consumption features. Here are some highlights of the Nucleo U575ZI Q
board:


- STM32U575ZI microcontroller in LQFP144 package
- Internal SMPS to generate V core logic supply
- Two types of extension resources:

  - Arduino Uno V3 connectivity
  - ST morpho extension pin headers for full access to all STM32 I/Os

- On-board ST-LINK/V3E debugger/programmer
- Flexible board power supply:

   - USB VBUS or external source(3.3V, 5V, 7 - 12V)
   - ST-Link V3E

- Three users LEDs
- Two push-buttons: USER and RESET
- USB Type-C |trade| Sink device FS

Hardware
********

The STM32U575xx devices are an ultra-low-power microcontrollers family (STM32U5
Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core.
They operate at a frequency of up to 160 MHz.

- Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode)
- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
- Performance benchmark:

  - 1.5 DMPIS/MHz (Drystone 2.1)
  - 651 CoreMark |reg| (4.07 CoreMark |reg| /MHZ)

- Security

  - Arm |reg|  TrustZone |reg| and securable I/Os memories and peripherals
  - Flexible life cycle scheme with RDP (readout protection) and password protected debug
  - Root of trust thanks to unique boot entry and secure hide protection area (HDP)
  - Secure Firmware Installation thanks to embedded Root Secure Services
  - Secure Firmware Update support with TF-M
  - HASH hardware accelerator
  - Active tampers
  - True Random Number Generator NIST SP800-90B compliant
  - 96-bit unique ID
  - 512-byte One-Time Programmable for user data

- Clock management:

  - 4 to 50 MHz crystal oscillator
  - 32 kHz crystal oscillator for RTC (LSE)
  - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
  - Internal low-power 32 kHz RC ( |plusminus| 5%)
  - 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by
    LSE (better than  |plusminus| 0.25 % accuracy)
  - 3 PLLs for system clock, USB, audio, ADC
  - Internal 48 MHz with clock recovery

- Power management

  - Embedded regulator (LDO)
  - Embedded SMPS step-down converter supporting switch on-the-fly and voltage scaling

- RTC with HW calendar and calibration
- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
- Up to 17 timers and 2 watchdogs

  - 2x 16-bit advanced motor-control
  - 2x 32-bit and 5 x 16-bit general purpose
  - 4x low-power 16-bit timers (available in Stop mode)
  - 2x watchdogs
  - 2x SysTick timer

- ART accelerator

  - 8-Kbyte instruction cache allowing 0-wait-state execution from Flash and
    external memories: up to 160 MHz, MPU, 240 DMIPS and DSP
  - 4-Kbyte data cache for external memories

- Memories

  - 2-Mbyte Flash memory with ECC, 2 banks read-while-write, including 512 Kbytes with 100 kcycles
  - 786-Kbyte SRAM with ECC OFF or 722-Kbyte SRAM including up to 322-Kbyte SRAM with ECC ON
  - External memory interface supporting SRAM, PSRAM, NOR, NAND and FRAM memories
  - 2 Octo-SPI memory interfaces

- Rich analog peripherals (independent supply)

  - 14-bit ADC 2.5-Msps, resolution up to 16 bits with hardware oversampling
  - 12-bit ADC 2.5-Msps, with hardware oversampling, autonomous in Stop 2 mode
  - 2 12-bit DAC, low-power sample and hold
  - 2 operational amplifiers with built-in PGA
  - 2 ultra-low-power comparators

- Up to 22 communication interfaces

  - USB Type-C / USB power delivery controller
  - USB OTG 2.0 full-speed controller
  - 2x SAIs (serial audio interface)
  - 4x I2C FM+(1 Mbit/s), SMBus/PMBus
  - 6x USARTs (ISO 7816, LIN, IrDA, modem)
  - 3x SPIs (5x SPIs with dual OCTOSPI in SPI mode)
  - 1x FDCAN
  - 2x SDMMC interface
  - 16- and 4-channel DMA controllers, functional in Stop mode
  - 1 multi-function digital filter (6 filters)+ 1 audio digital filter with
    sound-activity detection

- CRC calculation unit
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
- True Random Number Generator (RNG)

- Graphic features

  - Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation
  - 1 digital camera interface

- Mathematical co-processor

 - CORDIC for trigonometric functions acceleration
 - FMAC (filter mathematical accelerator)

More information about STM32U575ZI can be found here:

- `STM32U575ZI on www.st.com`_
- `STM32U575 reference manual`_

Supported Features
==================

The Zephyr nucleo_u575zi_q board configuration supports the following hardware features:

+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component                    |
+===========+============+=====================================+
| CAN/CANFD | on-chip    | canbus                              |
+-----------+------------+-------------------------------------+
| CLOCK     | on-chip    | reset and clock control             |
+-----------+------------+-------------------------------------+
| DAC       | on-chip    | DAC Controller                      |
+-----------+------------+-------------------------------------+
| GPIO      | on-chip    | gpio                                |
+-----------+------------+-------------------------------------+
| I2C       | on-chip    | i2c                                 |
+-----------+------------+-------------------------------------+
| NVIC      | on-chip    | nested vector interrupt controller  |
+-----------+------------+-------------------------------------+
| PINMUX    | on-chip    | pinmux                              |
+-----------+------------+-------------------------------------+
| SPI       | on-chip    | spi                                 |
+-----------+------------+-------------------------------------+
| UART      | on-chip    | serial port-polling;                |
|           |            | serial port-interrupt               |
+-----------+------------+-------------------------------------+
| WATCHDOG  | on-chip    | independent watchdog                |
+-----------+------------+-------------------------------------+
| USB FS    | on-chip    | USB Full Speed device               |
+-----------+------------+-------------------------------------+
| BKP SRAM  | on-chip    | Backup SRAM                         |
+-----------+------------+-------------------------------------+
| RNG       | on-chip    | True Random number generator        |
+-----------+------------+-------------------------------------+
| RTC       | on-chip    | rtc                                 |
+-----------+------------+-------------------------------------+


Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in the defconfig file:
:zephyr_file:`boards/st/nucleo_u575zi_q/nucleo_u575zi_q_defconfig`


Connections and IOs
===================

Nucleo U575ZI Q Board has 9 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.

For more details please refer to `STM32 Nucleo-144 board User Manual`_.

Default Zephyr Peripheral Mapping:
----------------------------------


- CAN/CANFD_TX: PD1
- CAN/CANFD_RX: PD0
- DAC1_OUT1 : PA4
- I2C_1_SCL : PB8
- I2C_1_SDA : PB9
- I2C_2_SCL : PF1
- I2C_2_SDA : PF0
- LD1 : PC7
- LD2 : PB7
- LD3 : PG2
- LPUART_1_TX : PG7
- LPUART_1_RX : PG8
- SPI_1_NSS : PA4
- SPI_1_SCK : PA5
- SPI_1_MISO : PA6
- SPI_1_MOSI : PA7
- UART_1_TX : PA9
- UART_1_RX : PA10
- UART_2_TX : PD5
- UART_2_RX : PD6
- USER_PB : PC13

System Clock
------------

Nucleo U575ZI Q System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at
160MHz, driven by 4MHz medium speed internal oscillator.

Serial Port
-----------

Nucleo U575ZI Q board has 6 U(S)ARTs. The Zephyr console output is assigned to
USART1. Default settings are 115200 8N1.


Backup SRAM
-----------

In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
do it by removing ``SB50`` jumper on the back side of the board.


Programming and Debugging
*************************

Nucleo U575ZI-Q board includes an ST-LINK/V3 embedded debug tool interface.
This probe allows to flash the board using various tools.

Flashing
========

Board is configured to be flashed using west STM32CubeProgrammer runner.
Installation of `STM32CubeProgrammer`_ is then required to flash the board.

Alternatively, openocd (provided in Zephyr SDK), JLink and pyocd can also be
used to flash and debug the board if west is told to use it as runner,
which can be done by passing either ``-r openocd``, ``-r jlink`` or ``-r pyocd``.

For pyocd additional target information needs to be installed.
This can be done by executing the following commands.

.. code-block:: console

   $ pyocd pack --update
   $ pyocd pack --install stm32u5


Flashing an application to Nucleo U575ZI Q
------------------------------------------

Connect the Nucleo U575ZI Q to your host computer using the USB port.
Then build and flash an application. Here is an example for the
:ref:`hello_world` application.

Run a serial host program to connect with your Nucleo board:

.. code-block:: console

   $ minicom -D /dev/ttyACM0

Then build and flash the application.

.. zephyr-app-commands::
   :zephyr-app: samples/hello_world
   :board: nucleo_u575zi_q
   :goals: build flash

You should see the following message on the console:

.. code-block:: console

   Hello World! arm

Debugging
=========

Default flasher for this board is openocd. It could be used in the usual way.
Here is an example for the :zephyr:code-sample:`blinky` application.

.. zephyr-app-commands::
   :zephyr-app: samples/basic/blinky
   :board: nucleo_u575zi_q
   :goals: debug

.. _STM32 Nucleo-144 board User Manual:
   https://www.st.com/resource/en/user_manual/dm00615305.pdf

.. _STM32U575ZI on www.st.com:
   https://www.st.com/en/microcontrollers/stm32u575zi.html

.. _STM32U575 reference manual:
   https://www.st.com/resource/en/reference_manual/rm0456-stm32u575585-armbased-32bit-mcus-stmicroelectronics.pdf

.. _STM32CubeProgrammer:
   https://www.st.com/en/development-tools/stm32cubeprog.html

.. _STMicroelectronics customized version of OpenOCD:
   https://github.com/STMicroelectronics/OpenOCD

Part 3

한국어 전문 번역

개요

Nucleo U575ZI Q는 Cortex-M33 기반 STM32U575ZI를 탑재한 Nucleo-144 prototype board입니다.

  • LQFP144 STM32U575ZI와 Vcore용 internal SMPS
  • Arduino Uno V3와 모든 I/O용 ST morpho
  • on-board ST-LINK/V3E
  • USB VBUS 또는 외부 3.3V·5V·7~12V와 ST-Link V3E 전원
  • User LED 3개, USER·RESET button
  • USB Type-C sink full-speed device

Hardware

STM32U575xx는 최대 160MHz의 ultra-low-power Cortex-M33 STM32U5 family입니다.

  • FlexPowerControl: Standby 최저 300nA, run mode 19.5µA/MHz
  • TrustZone과 FPU를 갖춘 32-bit Cortex-M33
  • Benchmark
    • Dhrystone 2.1 기준 1.5DMIPS/MHz
    • 651 CoreMark, 4.07 CoreMark/MHz
  • Security
    • TrustZone과 secure I/O·memory·peripheral
    • RDP와 password-protected debug를 포함한 flexible lifecycle
    • unique boot entry와 secure HDP에 의한 root of trust
    • embedded RSS 기반 Secure Firmware Installation
    • TF-M 기반 Secure Firmware Update
    • HASH accelerator
    • active tamper
    • NIST SP800-90B compliant true RNG
    • 96-bit unique ID
    • user data용 512-byte OTP
  • Clock
    • 4~50MHz crystal
    • RTC용 32kHz LSE
    • 16MHz HSI RC ±1%
    • 32kHz LSI RC ±5%
    • 100kHz~48MHz MSI 2개 중 하나는 LSE auto-trim, 정확도 ±0.25%보다 우수
    • system·USB·audio·ADC용 PLL 3개
    • clock recovery가 있는 internal 48MHz
  • Embedded LDO와 on-the-fly switching·voltage scaling을 지원하는 embedded SMPS
  • Hardware calendar·calibration RTC, capacitive sensing channel 최대 24개
  • 대부분 5V tolerant인 fast I/O 최대 136개와 1.08V independent-supply I/O 최대 14개
  • Timer 최대 17개와 watchdog 2개
    • advanced motor-control 16-bit 2개
    • 32-bit 2개와 general-purpose 16-bit 5개
    • Stop mode용 low-power 16-bit 4개
    • watchdog 2개
    • SysTick 2개
  • ART accelerator
    • Flash·external memory를 0-wait-state로 실행하는 8KB instruction cache: 160MHz, 240DMIPS, MPU·DSP
    • external memory용 4KB data cache
  • Memory
    • ECC와 100k-cycle 512KB 영역을 포함한 read-while-write dual-bank 2MB flash
    • ECC off 786KB SRAM 또는 ECC on 722KB SRAM; ECC 영역 최대 322KB
    • SRAM·PSRAM·NOR·NAND·FRAM external interface
    • OctoSPI 2개
  • Analog
    • hardware oversampling으로 최대 16-bit인 2.5MSPS 14-bit ADC
    • Stop 2 autonomous mode를 지원하는 2.5MSPS 12-bit ADC
    • low-power sample-and-hold 12-bit DAC 2개
    • PGA op amp 2개
    • ultra-low-power comparator 2개
  • Communication interface 최대 22개
    • USB Type-C/PD controller와 USB OTG 2.0 full-speed
    • SAI 2개
    • FM+·SMBus·PMBus I2C 4개
    • USART 6개
    • SPI 3개, dual OCTOSPI의 SPI mode까지 5개
    • FDCAN 1개
    • SDMMC 2개
    • Stop mode에서 동작하는 16-channel·4-channel DMA
    • 6-filter multi-function digital filter와 sound-activity detection audio filter
  • CRC, SWD·JTAG·ETM, true RNG
  • Chrom-ART(DMA2D) graphics accelerator와 digital camera interface
  • Trigonometric acceleration용 CORDIC와 filter mathematical accelerator(FMAC)

Zephyr 지원 기능

InterfaceControllerDriver/Component
CAN/CANFDon-chipcanbus
CLOCKon-chipreset and clock control
DACon-chipDAC Controller
GPIOon-chipgpio
I2Con-chipi2c
NVICon-chipnested vector interrupt controller
PINMUXon-chippinmux
SPIon-chipspi
UARTon-chipserial port-polling; serial port-interrupt
WATCHDOGon-chipindependent watchdog
USB FSon-chipUSB Full Speed device
BKP SRAMon-chipBackup SRAM
RNGon-chipTrue Random number generator
RTCon-chiprtc

표 밖 기능은 아직 지원하지 않습니다. 기본 설정은 boards/st/nucleo_u575zi_q/nucleo_u575zi_q_defconfig입니다.

Connection과 I/O

GPIO controller 9개가 pin muxing, input/output, pull-up 등을 담당합니다.

기본 Zephyr peripheral mapping

  • CAN/CANFD_TX : PD1
  • CAN/CANFD_RX : PD0
  • DAC1_OUT1 : PA4
  • I2C_1_SCL : PB8
  • I2C_1_SDA : PB9
  • I2C_2_SCL : PF1
  • I2C_2_SDA : PF0
  • LD1 : PC7
  • LD2 : PB7
  • LD3 : PG2
  • LPUART_1_TX : PG7
  • LPUART_1_RX : PG8
  • SPI_1_NSS : PA4
  • SPI_1_SCK : PA5
  • SPI_1_MISO : PA6
  • SPI_1_MOSI : PA7
  • UART_1_TX : PA9
  • UART_1_RX : PA10
  • UART_2_TX : PD5
  • UART_2_RX : PD6
  • USER_PB : PC13

Clock·serial·backup SRAM

기본 system clock은 4MHz MSI가 구동하는 PLL의 160MHz입니다. U(S)ART 6개 중 console은 USART1, 115200 8N1입니다. Backup SRAM 시험 시에는 board 뒷면의 SB50 jumper를 제거해 VBAT를 VDD에서 분리할 수 있습니다.

Programming and debugging

ST-LINK/V3 probe와 STM32CubeProgrammer runner가 기본입니다. -r openocd, -r jlink, -r pyocd로 다른 runner를 고를 수 있으며 PyOCD에는 target pack이 필요합니다.

$ pyocd pack --update
$ pyocd pack --install stm32u5
$ minicom -D /dev/ttyACM0
west build -b nucleo_u575zi_q samples/hello_world
west flash
Hello World! arm

Debugging

기본 debug flasher는 OpenOCD입니다.

west build -b nucleo_u575zi_q samples/basic/blinky
west debug

참고 자료

Source

출처

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