boards/st/nucleo_f412zg/doc/index.html · boards/st/nucleo_f412zg/doc/index.rst 공식 원문 ↗

Zephyr 3.7.0 · Boards · ST · Nucleo-144

ST Nucleo F412ZG

1MB flash Nucleo-144의 Zio·Morpho pin과 Ethernet-over-USB 기본 network를 살펴봅니다.

Official pathboards/st/nucleo_f412zg/doc/index.html
Source fileboards/st/nucleo_f412zg/doc/index.rst
Source versionZephyr 3.7.0
TranslationFull · reviewed

본문 기준: Zephyr 3.7.0 LTS3 · 이후 유지보수 패치는 별도입니다.

Part 1

요약·해설

지원표 8행, connector 4면, 96MHz clock·UART3 console·USB pin·기본 network와 설정명 오기를 설명합니다.

MCU

STM32F412ZG

Flash

1MB

Clock

96MHz

Network

Ethernet over USB

Part 2

접을 수 있는 영어 원문 전체

영어 원문 전체 펼치기
원문 SHA-256 70487E4015E8BC062FF65F215A21298A55D274BA15C9C02D73CF477C20F3F191
.. _nucleo_f412zg_board:

ST Nucleo F412ZG
################

Overview
********

The Nucleo F412ZG board features an ARM Cortex-M4 based STM32F412ZG MCU
with a wide range of connectivity support and configurations. Here are
some highlights of the Nucleo F412ZG board:

- STM32 microcontroller in LQFP144 package
- Two types of extension resources:

  - ST Zio connector including: support for Arduino* Uno V3 connectivity
    (A0 to A5, D0 to D15) and additional signals exposing a wide range of
    peripherals
  - ST morpho extension pin headers for full access to all STM32 I/Os

- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Flexible board power supply:

  - 5 V from ST-LINK/V2-1 USB VBUS
  - External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
    connectors, 5 V on ST morpho connector

- Three user LEDs
- Two push-buttons: USER and RESET

.. image:: ../../../../../../../boards/st/nucleo_f412zg/doc/img/nucleo_f412zg.jpg
   :align: center
   :alt: Nucleo F412ZG

More information about the board can be found at the `Nucleo F412ZG website`_.

Hardware
********

Nucleo F412ZG provides the following hardware components:

- STM32F412ZGT6 in LQFP144 package
- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
- 100 MHz max CPU frequency
- VDD from 1.7 V to 3.6 V
- 1 MB Flash
- 256 KB SRAM
- GPIO with external interrupt capability
- 12-bit ADC with 16 channels, with FIFO and burst support
- RTC
- 14 General purpose timers
- 2 watchdog timers (independent and window)
- SysTick timer
- USART/UART (4)
- I2C (4)
- SPI (5)
- SDIO
- USB 2.0 OTG FS
- DMA Controller
- CRC calculation unit

More information about STM32F412ZG can be found here:

- `STM32F412ZG on www.st.com`_
- `STM32F412 reference manual`_

Supported Features
==================

The Zephyr nucleo_412zg board configuration supports the following hardware features:

+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component                    |
+===========+============+=====================================+
| NVIC      | on-chip    | nested vector interrupt controller  |
+-----------+------------+-------------------------------------+
| UART      | on-chip    | serial port-polling;                |
|           |            | serial port-interrupt               |
+-----------+------------+-------------------------------------+
| PINMUX    | on-chip    | pinmux                              |
+-----------+------------+-------------------------------------+
| GPIO      | on-chip    | gpio                                |
+-----------+------------+-------------------------------------+
| I2C       | on-chip    | i2c                                 |
+-----------+------------+-------------------------------------+
| SPI       | on-chip    | spi                                 |
+-----------+------------+-------------------------------------+
| USB       | on-chip    | usb                                 |
+-----------+------------+-------------------------------------+
| PWM       | on-chip    | pwm                                 |
+-----------+------------+-------------------------------------+

Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in
:zephyr_file:`boards/st/nucleo_f412zg/nucleo_f412zg_defconfig`


Connections and IOs
===================

Nucleo F412ZG Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
input/output, pull-up, etc.

Available pins:
---------------
.. image:: ../../../../../../../boards/st/nucleo_f412zg/doc/img/nucleo_f412zg_zio_left.jpg
   :align: center
   :alt: Nucleo F412ZG ZIO connectors (left)
.. image:: ../../../../../../../boards/st/nucleo_f412zg/doc/img/nucleo_f412zg_zio_right.jpg
   :align: center
   :alt: Nucleo F412ZG ZIO connectors (right)
.. image:: ../../../../../../../boards/st/nucleo_f412zg/doc/img/nucleo_f412zg_morpho_left.jpg
   :align: center
   :alt: Nucleo F412ZG Morpho connectors (left)
.. image:: ../../../../../../../boards/st/nucleo_f412zg/doc/img/nucleo_f412zg_morpho_right.jpg
   :align: center
   :alt: Nucleo F412ZG Morpho connectors (right)

For more details please refer to `STM32 Nucleo-144 board User Manual`_.

Default Zephyr Peripheral Mapping:
----------------------------------

- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
- UART_6 TX/RX : PG14/PG9 (Arduino Serial)
- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
- SPI1 NSS/SCK/MISO/MOSI : PD14/PA5/PA6/PA7 (Arduino SPI)
- PWM_2_CH1 : PA0
- USER_PB : PC13
- LD1 : PB0
- LD2 : PB7
- LD3 : PB14
- USB DM : PA11
- USB DP : PA12

System Clock
------------

Nucleo F412ZG System Clock could be driven by internal or external oscillator,
as well as main PLL clock. By default System clock is driven by PLL clock at 96MHz,
driven by 8MHz high speed external clock.

Serial Port
-----------

Nucleo F412ZG board has 4 UARTs. The Zephyr console output is assigned to UART3.
Default settings are 115200 8N1.

Network interface
-----------------

Ethernet over USB is configured as the default network interface

Programming and Debugging
*************************

Nucleo F412ZG board includes an ST-LINK/V2-1 embedded debug tool interface.
This interface is supported by the openocd version included in Zephyr SDK.


.. _Nucleo F412ZG website:
   https://www.st.com/en/evaluation-tools/nucleo-f412zg.html

.. _STM32 Nucleo-144 board User Manual:
   https://www.st.com/resource/en/user_manual/dm00244518.pdf

.. _STM32F412ZG on www.st.com:
   https://www.st.com/en/microcontrollers/stm32f412zg.html

.. _STM32F412 reference manual:
   https://www.st.com/resource/en/reference_manual/dm00180369.pdf

Part 3

한국어 전문 번역

Nucleo F412ZG

개요

Nucleo F412ZG는 Arm Cortex-M4 기반 STM32F412ZG를 탑재한 Nucleo-144 board입니다. Arduino Uno V3의 A0~A5·D0~D15와 추가 peripheral signal을 제공하는 ST Zio connector, 모든 STM32 I/O를 노출하는 ST morpho header, SWD connector가 있는 onboard ST-LINK/V2-1을 갖춥니다.

  • ST-LINK USB VBUS 5V 또는 Zio·morpho의 external 3.3V·5V·7~12V 전원
  • User LED 3개
  • USER·RESET push-button

Hardware

  • LQFP144 package의 STM32F412ZGT6
  • FPU가 있는 Arm 32-bit Cortex-M4, 최대 100MHz
  • VDD 1.7~3.6V
  • 1MB flash, 256KB SRAM
  • External interrupt GPIO
  • FIFO와 burst를 지원한다고 기재된 16-channel 12-bit ADC
  • RTC, general-purpose timer 14개
  • Independent/window watchdog 2개와 SysTick
  • USART/UART 4개, I2C 4개, SPI 5개
  • SDIO, USB 2.0 OTG FS, DMA controller, CRC unit

Zephyr 지원 기능

InterfaceControllerDriver/Component
NVICon-chipnested vector interrupt controller
UARTon-chipserial port-polling; serial port-interrupt
PINMUXon-chippinmux
GPIOon-chipgpio
I2Con-chipi2c
SPIon-chipspi
USBon-chipusb
PWMon-chippwm

표 밖 기능은 아직 지원하지 않으며 기본 설정은 boards/st/nucleo_f412zg/nucleo_f412zg_defconfig입니다.

Connection과 I/O

GPIO controller 8개가 pin muxing, input/output, pull-up 등을 담당합니다.

Nucleo F412ZG ZIO left
Nucleo F412ZG ZIO right
Nucleo F412ZG Morpho left
Nucleo F412ZG Morpho right
  • UART_3 TX/RX : PD8/PD9 (ST-Link Virtual COM)
  • UART_6 TX/RX : PG14/PG9 (Arduino Serial)
  • I2C1 SCL/SDA : PB8/PB9
  • SPI1 NSS/SCK/MISO/MOSI : PD14/PA5/PA6/PA7
  • PWM_2_CH1 : PA0
  • USER_PB : PC13
  • LD1/LD2/LD3 : PB0/PB7/PB14
  • USB DM/DP : PA11/PA12

Clock, console과 network

기본 system clock은 8MHz HSE를 입력으로 한 96MHz PLL clock입니다. UART 4개 중 console은 UART3이며 115200 8N1입니다. Ethernet over USB가 기본 network interface로 설정됩니다.

Programming and debugging

Embedded ST-LINK/V2-1은 Zephyr SDK의 OpenOCD가 지원합니다.

참고 자료

Source

출처

영어 원문에는 문단, 문서 지시문, 표, 코드, 코드 심벌, 경로를 그대로 보존했습니다.