Part 1
요약·해설
지원 기능 21종과 핀 38행, LinkServer·on-board/외부 J-Link 명령, OctalSPI·SD 카드 연결과 flash 복구를 설명합니다.
Cortex-M33 300 MHz · HiFi 4 DSP
4.5 MB SRAM · OctalSPI · PSRAM
LinkServer CMSIS-DAP
Part 2
접을 수 있는 영어 원문 전체
영어 원문 전체 펼치기
1695A375253DD8DDA6710377CBA8FFDF826AD3EE64AF8FC08A7B522858BFAF16
.. _mimxrt685_evk:
NXP MIMXRT685-EVK
##################
Overview
********
The i.MX RT600 is a crossover MCU family optimized for 32-bit immersive audio
playback and voice user interface applications combining a high-performance
Cadence Tensilica HiFi 4 audio DSP core with a next-generation Cortex-M33
core. The i.MX RT600 family of crossover MCUs is designed to unlock the
potential of voice-assisted end nodes with a secure, power-optimized embedded
processor.
The i.MX RT600 family provides up to 4.5MB of on-chip SRAM and several
high-bandwidth interfaces to access off-chip flash, including an Octal/Quad SPI
interface with an on-the-fly decryption engine.
.. image:: ../../../../../../../boards/nxp/mimxrt685_evk/doc/mimxrt685_evk.jpg
:align: center
:alt: MIMXRT685-EVK
Hardware
********
- MIMXRT685SFVKB Cortex-M33 (300 MHz, 128 KB TCM) core processor with Cadence Xtensa HiFi4 DSP
- Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP protocol (supporting Cortex M33 debug only)
- High speed USB port with micro A/B connector for the host or device functionality
- UART, I2C and SPI port bridging from i.MX RT685 target to USB via the on-board debug probe
- 512 MB Macronix Octal SPI Flash operating at 1.8 V
- 4.5 MB Apmemory PSRAM
- Full size SD card slot (SDIO)
- NXP PCA9420UK PMIC
- User LEDs
- Reset and User buttons
- Arduino and PMod/Host expansion connectors
- NXP FXOS8700CQ accelerometer
- Stereo audio codec with line in/out and electret microphone
- Stereo NXP TFA9894 digital amplifiers, with option for external +5V power for higher performance speakers
- Support for up to eight off-board digital microphones via 12-pin header
- Two on-board DMICS
For more information about the MIMXRT685 SoC and MIMXRT685-EVK board, see
these references:
- `i.MX RT685 Website`_
- `i.MX RT685 Datasheet`_
- `i.MX RT685 Reference Manual`_
- `MIMXRT685-EVK Website`_
- `MIMXRT685-EVK User Guide`_
- `MIMXRT685-EVK Schematics`_
Supported Features
==================
NXP considers the MIMXRT685-EVK as a superset board for the i.MX RT6xx
family of MCUs. This board is a focus for NXP's Full Platform Support for
Zephyr, to better enable the entire RT6xx family. NXP prioritizes enabling
this board with new support for Zephyr features. The mimxrt685_evk board
configuration supports the hardware features below. Another very similar
board is the :ref:`mimxrt595_evk`, and that board may have additional features
already supported, which can also be re-used on this mimxrt685_evk board:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| OS_TIMER | on-chip | os timer |
+-----------+------------+-------------------------------------+
| IOCON | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | OctalSPI Flash |
+-----------+------------+-------------------------------------+
| USART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| I2S | on-chip | i2s |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+-------------------------------------+
| HWINFO | on-chip | Unique device serial number |
+-----------+------------+-------------------------------------+
| RTC | on-chip | counter |
+-----------+------------+-------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
| WDT | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| SDHC | on-chip | disk access |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| CTIMER | on-chip | counter |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| FLEXSPI | on-chip | flash programming |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33_defconfig`
Other hardware features are not currently supported by the port.
Connections and IOs
===================
The MIMXRT685 SoC has IOCON registers, which can be used to configure the
functionality of a pin.
+---------+-----------------+----------------------------+
| Name | Function | Usage |
+=========+=================+============================+
| PIO0_2 | USART | USART RX |
+---------+-----------------+----------------------------+
| PIO0_1 | USART | USART TX |
+---------+-----------------+----------------------------+
| PIO0_14 | GPIO | GREEN LED |
+---------+-----------------+----------------------------+
| PIO1_1 | GPIO | SW0 |
+---------+-----------------+----------------------------+
| PIO0_17 | I2C | I2C SDA |
+---------+-----------------+----------------------------+
| PIO0_18 | I2C | I2C SCL |
+---------+-----------------+----------------------------+
| PIO1_5 | GPIO | FXOS8700 TRIGGER |
+---------+-----------------+----------------------------+
| PIO1_5 | SPI | SPI MOSI |
+---------+-----------------+----------------------------+
| PIO1_4 | SPI | SPI MISO |
+---------+-----------------+----------------------------+
| PIO1_3 | SPI | SPI SCK |
+---------+-----------------+----------------------------+
| PIO1_6 | SPI | SPI SSEL |
+---------+-----------------+----------------------------+
| PIO0_23 | I2S | I2S DATAOUT |
+---------+-----------------+----------------------------+
| PIO0_22 | I2S | I2S TX WS |
+---------+-----------------+----------------------------+
| PIO0_21 | I2S | I2S TX SCK |
+---------+-----------------+----------------------------+
| PIO0_9 | I2S | I2S DATAIN |
+---------+-----------------+----------------------------+
| PIO0_29 | USART | USART TX |
+---------+-----------------+----------------------------+
| PIO0_30 | USART | USART RX |
+---------+-----------------+----------------------------+
| PIO1_11 | FLEXSPI0B_DATA0 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO1_12 | FLEXSPI0B_DATA1 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO1_13 | FLEXSPI0B_DATA2 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO1_14 | FLEXSPI0B_DATA3 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO1_29 | FLEXSPI0B_SCLK | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_12 | PIO2_12 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_17 | FLEXSPI0B_DATA4 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_18 | FLEXSPI0B_DATA5 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_19 | FLEXSPI0B_SS0_N | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_22 | FLEXSPI0B_DATA6 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO2_23 | FLEXSPI0B_DATA7 | OctalSPI Flash |
+---------+-----------------+----------------------------+
| PIO0_27 | SCT0_OUT7 | PWM |
+---------+-----------------+----------------------------+
| PIO1_30 | SD0_CLK | SD card |
+---------+-----------------+----------------------------+
| PIO1_31 | SD0_CMD | SD card |
+---------+-----------------+----------------------------+
| PIO2_0 | SD0_D0 | SD card |
+---------+-----------------+----------------------------+
| PIO2_1 | SD0_D1 | SD card |
+---------+-----------------+----------------------------+
| PIO2_2 | SD0_D2 | SD card |
+---------+-----------------+----------------------------+
| PIO2_3 | SD0_D3 | SD card |
+---------+-----------------+----------------------------+
| PIO2_4 | SD0_WR_PRT | SD card |
+---------+-----------------+----------------------------+
| PIO2_9 | SD0_CD | SD card |
+---------+-----------------+----------------------------+
| PIO2_10 | SD0_RST | SD card |
+---------+-----------------+----------------------------+
System Clock
============
The MIMXRT685 EVK is configured to use the OS Event timer
as a source for the system clock.
Serial Port
===========
The MIMXRT685 SoC has 8 FLEXCOMM interfaces for serial communication. One is
configured as USART for the console and the remaining are not used.
Programming and Debugging
*************************
Build and flash applications as usual (see :ref:`build_an_application` and
:ref:`application_run` for more details).
Configuring a Debug Probe
=========================
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the LPC-Link2.
.. tabs::
.. group-tab:: LinkServer CMSIS-DAP
1. Install the :ref:`linkserver-debug-host-tools` and make sure they are in your
search path. LinkServer works with the default CMSIS-DAP firmware included in
the on-board debugger.
2. Make sure the jumpers JP17, JP18 and JP19 are installed.
linkserver is the default runner for this board
.. code-block:: console
west flash
west debug
.. group-tab:: LPCLink2 JLink Onboard
1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path.
2. To connect the SWD signals to onboard debug circuit, install jumpers JP17, JP18 and JP19,
if not already done (these jumpers are installed by default).
3. Follow the instructions in :ref:`lpclink2-jlink-onboard-debug-probe` to program the
J-Link firmware. Please make sure you have the latest firmware for this board.
.. code-block:: console
west flash -r jlink
west debug -r jlink
.. group-tab:: JLink External
1. Install the :ref:`jlink-debug-host-tools` and make sure they are in your search path.
2. To disconnect the SWD signals from onboard debug circuit, **remove** jumpers J17, J18,
and J19 (these are installed by default).
3. Connect the J-Link probe to J2 10-pin header.
See :ref:`jlink-external-debug-probe` for more information.
.. code-block:: console
west flash -r jlink
west debug -r jlink
Configuring a Console
=====================
Connect a USB cable from your PC to J16, and use the serial terminal of your choice
(minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Flashing
========
Here is an example for the :ref:`hello_world` application. This example uses the
:ref:`linkserver-debug-host-tools` as default.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt685_evk/mimxrt685s/cm33
:goals: flash
Open a serial terminal, reset the board (press the RESET button), and you should
see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS v1.14.0 *****
Hello World! mimxrt685_evk
Debugging
=========
Here is an example for the :ref:`hello_world` application. This example uses the
:ref:`linkserver-debug-host-tools` as default.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt685_evk/mimxrt685s/cm33
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:
.. code-block:: console
***** Booting Zephyr OS zephyr-v2.3.0 *****
Hello World! mimxrt685_evk
Troubleshooting
===============
If the debug probe fails to connect with the following error, it's possible
that the image in flash is interfering and causing this issue.
.. code-block:: console
Remote debugging using :2331
Remote communication error. Target disconnected.: Connection reset by peer.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
(gdb) Could not connect to target.
Please check power, connection and settings.
You can fix it by erasing and reprogramming the flash with the following
steps:
#. Set the SW5 DIP switches to ON-ON-ON to prevent booting from flash.
#. Reset by pressing SW3
#. Run ``west debug`` or ``west flash`` again with a known working Zephyr
application (example "Hello World").
#. Set the SW5 DIP switches to ON-OFF-ON to boot from flash.
#. Reset by pressing SW3
.. _MIMXRT685-EVK Website:
https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt600-evaluation-kit:MIMXRT685-EVK
.. _MIMXRT685-EVK User Guide:
https://www.nxp.com/webapp/Download?colCode=UM11159
.. _MIMXRT685-EVK Schematics:
https://www.nxp.com/downloads/en/design-support/RT685-DESIGNFILES.zip
.. _i.MX RT685 Website:
https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus/i-mx-rt600-crossover-mcu-with-arm-cortex-m33-and-dsp-cores:i.MX-RT600
.. _i.MX RT685 Datasheet:
https://www.nxp.com/docs/en/data-sheet/RT600.pdf
.. _i.MX RT685 Reference Manual:
https://www.nxp.com/webapp/Download?colCode=UM11147
Part 3
한국어 전문 번역
개요
i.MX RT600은 32-bit immersive audio playback과 voice user interface application에 맞춘 crossover MCU 계열입니다. 고성능 Cadence Tensilica HiFi 4 audio DSP core와 차세대 Cortex-M33 core를 결합해 음성 보조 end node를 안전하고 전력 효율적으로 구현하도록 설계됐습니다.
i.MX RT600 계열은 최대 4.5 MB on-chip SRAM과 off-chip flash용 고대역폭 interface를 제공합니다. Octal/Quad SPI에는 on-the-fly decryption engine도 포함됩니다.

하드웨어
MIMXRT685SFVKB300 MHz Cortex-M33, 128 KB TCM, Cadence Xtensa HiFi4 DSP- CMSIS-DAP protocol의 high-speed USB Link2 debug probe. Cortex-M33 debug만 지원
- Host 또는 device 기능용 micro A/B connector의 high-speed USB port
- On-board debug probe를 통한 target UART, I2C, SPI의 USB bridge
- 1.8 V에서 동작하는 512 MB Macronix Octal SPI Flash와 4.5 MB Apmemory PSRAM
- Full-size SD card slot(SDIO), NXP PCA9420UK PMIC
- User LED, Reset·User button, Arduino·PMod/Host expansion connector
- NXP FXOS8700CQ accelerometer
- Line in/out와 electret microphone을 갖춘 stereo audio codec
- 고성능 speaker용 외부 +5 V 선택지를 제공하는 stereo NXP TFA9894 digital amplifier
- 12-pin header를 통한 off-board digital microphone 최대 8개와 on-board DMIC 2개
지원 기능
NXP는 MIMXRT685-EVK를 i.MX RT6xx MCU 계열의 상위 집합 보드로 보고 Zephyr Full Platform Support의 우선 대상으로 삼습니다. 비슷한 MIMXRT595-EVK에 먼저 활성화된 기능도 이 보드에서 재사용할 수 있습니다.
| 인터페이스 | 컨트롤러 | 드라이버/컴포넌트 |
|---|---|---|
NVIC | on-chip | nested vector interrupt controller |
SYSTICK | on-chip | systick |
OS_TIMER | on-chip | os timer |
IOCON | on-chip | pinmux |
GPIO | on-chip | gpio |
FLASH | on-chip | OctalSPI Flash |
USART | on-chip | serial port-polling; serial port-interrupt |
I2C | on-chip | i2c |
SPI | on-chip | spi |
I2S | on-chip | i2s |
CLOCK | on-chip | clock_control |
HWINFO | on-chip | Unique device serial number |
RTC | on-chip | counter |
PWM | on-chip | pwm |
WDT | on-chip | watchdog |
SDHC | on-chip | disk access |
USB | on-chip | USB device |
ADC | on-chip | adc |
CTIMER | on-chip | counter |
TRNG | on-chip | entropy |
FLEXSPI | on-chip | flash programming |
기본 구성은 boards/nxp/mimxrt685_evk/mimxrt685_evk_mimxrt685s_cm33_defconfig에 있습니다. 표 밖의 하드웨어 기능은 현재 port에서 지원하지 않습니다.
연결과 I/O
MIMXRT685 SoC는 IOCON register로 pin 기능을 설정합니다.
| 이름 | 기능 | 용도 |
|---|---|---|
PIO0_2 | USART | USART RX |
PIO0_1 | USART | USART TX |
PIO0_14 | GPIO | GREEN LED |
PIO1_1 | GPIO | SW0 |
PIO0_17 | I2C | I2C SDA |
PIO0_18 | I2C | I2C SCL |
PIO1_5 | GPIO | FXOS8700 TRIGGER |
PIO1_5 | SPI | SPI MOSI |
PIO1_4 | SPI | SPI MISO |
PIO1_3 | SPI | SPI SCK |
PIO1_6 | SPI | SPI SSEL |
PIO0_23 | I2S | I2S DATAOUT |
PIO0_22 | I2S | I2S TX WS |
PIO0_21 | I2S | I2S TX SCK |
PIO0_9 | I2S | I2S DATAIN |
PIO0_29 | USART | USART TX |
PIO0_30 | USART | USART RX |
PIO1_11 | FLEXSPI0B_DATA0 | OctalSPI Flash |
PIO1_12 | FLEXSPI0B_DATA1 | OctalSPI Flash |
PIO1_13 | FLEXSPI0B_DATA2 | OctalSPI Flash |
PIO1_14 | FLEXSPI0B_DATA3 | OctalSPI Flash |
PIO1_29 | FLEXSPI0B_SCLK | OctalSPI Flash |
PIO2_12 | PIO2_12 | OctalSPI Flash |
PIO2_17 | FLEXSPI0B_DATA4 | OctalSPI Flash |
PIO2_18 | FLEXSPI0B_DATA5 | OctalSPI Flash |
PIO2_19 | FLEXSPI0B_SS0_N | OctalSPI Flash |
PIO2_22 | FLEXSPI0B_DATA6 | OctalSPI Flash |
PIO2_23 | FLEXSPI0B_DATA7 | OctalSPI Flash |
PIO0_27 | SCT0_OUT7 | PWM |
PIO1_30 | SD0_CLK | SD card |
PIO1_31 | SD0_CMD | SD card |
PIO2_0 | SD0_D0 | SD card |
PIO2_1 | SD0_D1 | SD card |
PIO2_2 | SD0_D2 | SD card |
PIO2_3 | SD0_D3 | SD card |
PIO2_4 | SD0_WR_PRT | SD card |
PIO2_9 | SD0_CD | SD card |
PIO2_10 | SD0_RST | SD card |
시스템 클록
MIMXRT685-EVK는 OS Event timer를 system clock source로 사용합니다.
직렬 포트
SoC에는 serial communication용 FLEXCOMM interface가 8개 있습니다. 하나를 console USART로 구성하고 나머지는 사용하지 않습니다.
프로그래밍과 디버깅
일반 application과 같은 방식으로 build하고 flash합니다. 이 보드는 기본적으로 LPC-Link2를 사용하도록 구성되어 있습니다.
LinkServer CMSIS-DAP
- LinkServer host tool을 설치하고 검색 경로에 넣습니다. On-board debugger의 기본 CMSIS-DAP firmware와 함께 동작합니다.
JP17,JP18,JP19jumper가 장착됐는지 확인합니다.
LinkServer가 이 보드의 기본 runner입니다.
west flash
west debug
LPCLink2 J-Link on-board
- J-Link host tool을 설치하고 검색 경로에 넣습니다.
- SWD signal을 on-board debug circuit에 연결하려면 기본 장착된
JP17,JP18,JP19jumper를 설치합니다. - LPCLink2 J-Link on-board probe 절차에 따라 이 보드의 최신 J-Link firmware를 programming합니다.
west flash -r jlink
west debug -r jlink
외부 J-Link
- J-Link host tool을 설치하고 검색 경로에 넣습니다.
- SWD signal을 on-board debug circuit에서 분리하려면 기본 장착된
J17,J18,J19jumper를 제거합니다. - 외부 J-Link probe를
J210-pin header에 연결합니다.
west flash -r jlink
west debug -r jlink
콘솔
PC의 USB cable을 J16에 연결합니다. Terminal은 115200 baud, data 8 bits, parity None, stop bit 1로 설정합니다.
플래시
다음 hello_world 예제는 기본 LinkServer host tool을 사용합니다.
# Zephyr 저장소 루트에서
west build -b mimxrt685_evk/mimxrt685s/cm33 samples/hello_world
west flash
Serial terminal을 열고 RESET button을 누르면 다음 메시지가 표시됩니다.
***** Booting Zephyr OS v1.14.0 *****
Hello World! mimxrt685_evk
디버깅
# Zephyr 저장소 루트에서
west build -b mimxrt685_evk/mimxrt685s/cm33 samples/hello_world
west debug
Debugger에서 application을 단계 실행하면 terminal에 다음 메시지가 표시됩니다.
***** Booting Zephyr OS zephyr-v2.3.0 *****
Hello World! mimxrt685_evk
문제 해결
다음 오류로 debug probe 연결이 실패하면 flash의 image가 실행되어 연결을 방해하는 상황일 수 있습니다.
Remote debugging using :2331
Remote communication error. Target disconnected.: Connection reset by peer.
"monitor" command not supported by this target.
"monitor" command not supported by this target.
You can't do that when your target is `exec'
(gdb) Could not connect to target.
Please check power, connection and settings.
Flash를 지우고 정상 image를 다시 programming하려면 다음 순서를 따릅니다.
SW5DIP switch를ON-ON-ON으로 설정해 flash boot를 막습니다.SW3를 눌러 reset합니다.- 동작이 확인된 Zephyr application, 예를 들면 Hello World로
west debug또는west flash를 다시 실행합니다. SW5DIP switch를ON-OFF-ON으로 설정해 flash에서 boot하도록 합니다.SW3를 눌러 다시 reset합니다.
참고 자료
Source
출처
영어 원문에는 문단, 문서 지시문, 표, 코드, 코드 심벌, 경로를 그대로 보존했습니다.