요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
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.. SPDX-License-Identifier: GPL-2.0
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=======================================
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Known limitations of CPU virtualization
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=======================================
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Whenever perfect emulation of a CPU feature is impossible or too hard, KVM
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has to choose between not implementing the feature at all or introducing
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behavioral differences between virtual machines and bare metal systems.
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This file documents some of the known limitations that KVM has in
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virtualizing CPU features.
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x86
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===
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``KVM_GET_SUPPORTED_CPUID`` issues
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----------------------------------
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x87 features
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~~~~~~~~~~~~
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Unlike most other CPUID feature bits, CPUID[EAX=7,ECX=0]:EBX[6]
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(FDP_EXCPTN_ONLY) and CPUID[EAX=7,ECX=0]:EBX]13] (ZERO_FCS_FDS) are
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clear if the features are present and set if the features are not present.
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Clearing these bits in CPUID has no effect on the operation of the guest;
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if these bits are set on hardware, the features will not be present on
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any virtual machine that runs on that hardware.
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**Workaround:** It is recommended to always set these bits in guest CPUID.
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Note however that any software (e.g ``WIN87EM.DLL``) expecting these features
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to be present likely predates these CPUID feature bits, and therefore
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doesn't know to check for them anyway.
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``KVM_SET_VCPU_EVENTS`` issue
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-----------------------------
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Invalid KVM_SET_VCPU_EVENTS input with respect to error codes *may* result in
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failed VM-Entry on Intel CPUs. Pre-CET Intel CPUs require that exception
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injection through the VMCS correctly set the "error code valid" flag, e.g.
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require the flag be set when injecting a #GP, clear when injecting a #UD,
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clear when injecting a soft exception, etc. Intel CPUs that enumerate
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IA32_VMX_BASIC[56] as '1' relax VMX's consistency checks, and AMD CPUs have no
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restrictions whatsoever. KVM_SET_VCPU_EVENTS doesn't sanity check the vector
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versus "has_error_code", i.e. KVM's ABI follows AMD behavior.
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Nested virtualization features
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------------------------------
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TBD
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x2APIC
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------
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When KVM_X2APIC_API_USE_32BIT_IDS is enabled, KVM activates a hack/quirk that
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allows sending events to a single vCPU using its x2APIC ID even if the target
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vCPU has legacy xAPIC enabled, e.g. to bring up hotplugged vCPUs via INIT-SIPI
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on VMs with > 255 vCPUs. A side effect of the quirk is that, if multiple vCPUs
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have the same physical APIC ID, KVM will deliver events targeting that APIC ID
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only to the vCPU with the lowest vCPU ID. If KVM_X2APIC_API_USE_32BIT_IDS is
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not enabled, KVM follows x86 architecture when processing interrupts (all vCPUs
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matching the target APIC ID receive the interrupt).
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MTRRs
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-----
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KVM does not virtualize guest MTRR memory types. KVM emulates accesses to MTRR
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MSRs, i.e. {RD,WR}MSR in the guest will behave as expected, but KVM does not
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honor guest MTRRs when determining the effective memory type, and instead
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treats all of guest memory as having Writeback (WB) MTRRs.
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CR0.CD
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------
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KVM does not virtualize CR0.CD on Intel CPUs. Similar to MTRR MSRs, KVM
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emulates CR0.CD accesses so that loads and stores from/to CR0 behave as
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expected, but setting CR0.CD=1 has no impact on the cachaeability of guest
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memory.
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Note, this erratum does not affect AMD CPUs, which fully virtualize CR0.CD in
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hardware, i.e. put the CPU caches into "no fill" mode when CR0.CD=1, even when
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running in the guest.
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
완전 에뮬레이션의 한계
1-16CPU feature를 완벽히 에뮬레이션할 수 없거나 비용이 지나치게 크면 KVM은 기능을 제공하지 않거나 bare metal과 VM 사이의 동작 차이를 허용해야 합니다. 이 문서는 알려진 차이를 기록합니다.
.. SPDX-License-Identifier: GPL-2.0
=======================================
Known limitations of CPU virtualization
=======================================
Whenever perfect emulation of a CPU feature is impossible or too hard, KVM
has to choose between not implementing the feature at all or introducing
behavioral differences between virtual machines and bare metal systems.
This file documents some of the known limitations that KVM has in
virtualizing CPU features.
x86
===
x87 CPUID feature bit
17-35`FDP_EXCPTN_ONLY`와 `ZERO_FCS_FDS`는 일반 CPUID bit와 반대로 feature가 있으면 clear, 없으면 set입니다. guest CPUID에서 bit를 clear해도 guest 동작은 바뀌지 않으며 hardware에서 bit가 set이면 그 기능은 어떤 VM에도 제공되지 않습니다.
workaround는 guest CPUID에서 두 bit를 항상 set하는 것입니다. `WIN87EM.DLL`처럼 기능을 기대하는 오래된 software는 이 CPUID bit보다 오래되어 애초에 확인하지 않을 가능성이 큽니다.
``KVM_GET_SUPPORTED_CPUID`` issues
----------------------------------
x87 features
~~~~~~~~~~~~
Unlike most other CPUID feature bits, CPUID[EAX=7,ECX=0]:EBX[6]
(FDP_EXCPTN_ONLY) and CPUID[EAX=7,ECX=0]:EBX]13] (ZERO_FCS_FDS) are
clear if the features are present and set if the features are not present.
Clearing these bits in CPUID has no effect on the operation of the guest;
if these bits are set on hardware, the features will not be present on
any virtual machine that runs on that hardware.
**Workaround:** It is recommended to always set these bits in guest CPUID.
Note however that any software (e.g ``WIN87EM.DLL``) expecting these features
to be present likely predates these CPUID feature bits, and therefore
doesn't know to check for them anyway.
KVM_SET_VCPU_EVENTS와 error code
36-47error-code flag가 vector와 맞지 않는 잘못된 `KVM_SET_VCPU_EVENTS` 입력은 Intel CPU에서 VM-entry 실패를 일으킬 수 있습니다. pre-CET Intel은 #GP에는 flag 설정, #UD와 soft exception에는 clear 같은 VMCS 일관성을 요구합니다.
`IA32_VMX_BASIC[56]`이 1인 Intel은 이 검사를 완화하고 AMD는 제한이 없습니다. KVM ABI도 AMD 동작을 따라 vector와 `has_error_code` 조합을 sanity check하지 않습니다.
``KVM_SET_VCPU_EVENTS`` issue
-----------------------------
Invalid KVM_SET_VCPU_EVENTS input with respect to error codes *may* result in
failed VM-Entry on Intel CPUs. Pre-CET Intel CPUs require that exception
injection through the VMCS correctly set the "error code valid" flag, e.g.
require the flag be set when injecting a #GP, clear when injecting a #UD,
clear when injecting a soft exception, etc. Intel CPUs that enumerate
IA32_VMX_BASIC[56] as '1' relax VMX's consistency checks, and AMD CPUs have no
restrictions whatsoever. KVM_SET_VCPU_EVENTS doesn't sanity check the vector
versus "has_error_code", i.e. KVM's ABI follows AMD behavior.
nested virtualization
48-52Nested virtualization feature의 알려진 한계는 아직 문서화되지 않았으며 원문은 TBD로 남겨 둡니다.
Nested virtualization features
------------------------------
TBD
x2APIC 32-bit ID quirk
53-63`KVM_X2APIC_API_USE_32BIT_IDS`를 켜면 target vCPU가 legacy xAPIC을 사용해도 x2APIC ID로 단일 vCPU에 event를 보낼 수 있습니다. 255개보다 많은 vCPU를 가진 VM에서 INIT-SIPI로 hotplug vCPU를 올릴 때 유용합니다.
같은 physical APIC ID를 여러 vCPU가 가지면 이 quirk는 가장 낮은 vCPU ID에만 event를 전달합니다. 옵션을 끄면 x86 architecture대로 target APIC ID와 일치하는 모든 vCPU가 interrupt를 받습니다.
x2APIC
------
When KVM_X2APIC_API_USE_32BIT_IDS is enabled, KVM activates a hack/quirk that
allows sending events to a single vCPU using its x2APIC ID even if the target
vCPU has legacy xAPIC enabled, e.g. to bring up hotplugged vCPUs via INIT-SIPI
on VMs with > 255 vCPUs. A side effect of the quirk is that, if multiple vCPUs
have the same physical APIC ID, KVM will deliver events targeting that APIC ID
only to the vCPU with the lowest vCPU ID. If KVM_X2APIC_API_USE_32BIT_IDS is
not enabled, KVM follows x86 architecture when processing interrupts (all vCPUs
matching the target APIC ID receive the interrupt).
MTRR memory type
64-70KVM은 guest MTRR MSR read/write를 에뮬레이션하지만 effective memory type을 결정할 때 guest MTRR을 반영하지 않습니다. 모든 guest memory를 Writeback(WB) MTRR로 취급합니다.
MTRRs
-----
KVM does not virtualize guest MTRR memory types. KVM emulates accesses to MTRR
MSRs, i.e. {RD,WR}MSR in the guest will behave as expected, but KVM does not
honor guest MTRRs when determining the effective memory type, and instead
treats all of guest memory as having Writeback (WB) MTRRs.
Intel CR0.CD
71-80Intel에서 KVM은 CR0.CD 접근값을 에뮬레이션하지만 `CR0.CD=1`이 guest memory cacheability에 영향을 주지 않습니다. AMD는 hardware가 CR0.CD를 완전히 가상화해 guest에서도 CPU cache를 no-fill mode로 전환하므로 이 한계가 없습니다.
CR0.CD
------
KVM does not virtualize CR0.CD on Intel CPUs. Similar to MTRR MSRs, KVM
emulates CR0.CD accesses so that loads and stores from/to CR0 behave as
expected, but setting CR0.CD=1 has no impact on the cachaeability of guest
memory.
Note, this erratum does not affect AMD CPUs, which fully virtualize CR0.CD in
hardware, i.e. put the CPU caches into "no fill" mode when CR0.CD=1, even when
running in the guest.
요약·해설
errata.rst:1-80x87 CPUID, event injection, x2APIC, MTRR와 CR0.CD의 알려진 KVM 차이입니다.
레지스터, 비트 필드, 구조체와 호출 순서를 원문 표기 및 줄 좌표와 함께 보존했습니다.