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=====================================
MTD NAND Driver Programming Interface
=====================================
:Author: Thomas Gleixner
Introduction
============
The generic NAND driver supports almost all NAND and AG-AND based chips
and connects them to the Memory Technology Devices (MTD) subsystem of
the Linux Kernel.
This documentation is provided for developers who want to implement
board drivers or filesystem drivers suitable for NAND devices.
Known Bugs And Assumptions
==========================
None.
Documentation hints
===================
The function and structure docs are autogenerated. Each function and
struct member has a short description which is marked with an [XXX]
identifier. The following chapters explain the meaning of those
identifiers.
Function identifiers [XXX]
--------------------------
The functions are marked with [XXX] identifiers in the short comment.
The identifiers explain the usage and scope of the functions. Following
identifiers are used:
- [MTD Interface]
These functions provide the interface to the MTD kernel API. They are
not replaceable and provide functionality which is complete hardware
independent.
- [NAND Interface]
These functions are exported and provide the interface to the NAND
kernel API.
- [GENERIC]
Generic functions are not replaceable and provide functionality which
is complete hardware independent.
- [DEFAULT]
Default functions provide hardware related functionality which is
suitable for most of the implementations. These functions can be
replaced by the board driver if necessary. Those functions are called
via pointers in the NAND chip description structure. The board driver
can set the functions which should be replaced by board dependent
functions before calling nand_scan(). If the function pointer is
NULL on entry to nand_scan() then the pointer is set to the default
function which is suitable for the detected chip type.
Struct member identifiers [XXX]
-------------------------------
The struct members are marked with [XXX] identifiers in the comment. The
identifiers explain the usage and scope of the members. Following
identifiers are used:
- [INTERN]
These members are for NAND driver internal use only and must not be
modified. Most of these values are calculated from the chip geometry
information which is evaluated during nand_scan().
- [REPLACEABLE]
Replaceable members hold hardware related functions which can be
provided by the board driver. The board driver can set the functions
which should be replaced by board dependent functions before calling
nand_scan(). If the function pointer is NULL on entry to
nand_scan() then the pointer is set to the default function which is
suitable for the detected chip type.
- [BOARDSPECIFIC]
Board specific members hold hardware related information which must
be provided by the board driver. The board driver must set the
function pointers and datafields before calling nand_scan().
- [OPTIONAL]
Optional members can hold information relevant for the board driver.
The generic NAND driver code does not use this information.
Basic board driver
==================
For most boards it will be sufficient to provide just the basic
functions and fill out some really board dependent members in the nand
chip description structure.
Basic defines
-------------
At least you have to provide a nand_chip structure and a storage for
the ioremap'ed chip address. You can allocate the nand_chip structure
using kmalloc or you can allocate it statically. The NAND chip structure
embeds an mtd structure which will be registered to the MTD subsystem.
You can extract a pointer to the mtd structure from a nand_chip pointer
using the nand_to_mtd() helper.
Kmalloc based example
::
static struct mtd_info *board_mtd;
static void __iomem *baseaddr;
Static example
::
static struct nand_chip board_chip;
static void __iomem *baseaddr;
Partition defines
-----------------
If you want to divide your device into partitions, then define a
partitioning scheme suitable to your board.
::
#define NUM_PARTITIONS 2
static struct mtd_partition partition_info[] = {
{ .name = "Flash partition 1",
.offset = 0,
.size = 8 * 1024 * 1024 },
{ .name = "Flash partition 2",
.offset = MTDPART_OFS_NEXT,
.size = MTDPART_SIZ_FULL },
};
Hardware control function
-------------------------
The hardware control function provides access to the control pins of the
NAND chip(s). The access can be done by GPIO pins or by address lines.
If you use address lines, make sure that the timing requirements are
met.
*GPIO based example*
::
static void board_hwcontrol(struct mtd_info *mtd, int cmd)
{
switch(cmd){
case NAND_CTL_SETCLE: /* Set CLE pin high */ break;
case NAND_CTL_CLRCLE: /* Set CLE pin low */ break;
case NAND_CTL_SETALE: /* Set ALE pin high */ break;
case NAND_CTL_CLRALE: /* Set ALE pin low */ break;
case NAND_CTL_SETNCE: /* Set nCE pin low */ break;
case NAND_CTL_CLRNCE: /* Set nCE pin high */ break;
}
}
*Address lines based example.* It's assumed that the nCE pin is driven
by a chip select decoder.
::
static void board_hwcontrol(struct mtd_info *mtd, int cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
switch(cmd){
case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;
case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;
case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
}
}
Device ready function
---------------------
If the hardware interface has the ready busy pin of the NAND chip
connected to a GPIO or other accessible I/O pin, this function is used
to read back the state of the pin. The function has no arguments and
should return 0, if the device is busy (R/B pin is low) and 1, if the
device is ready (R/B pin is high). If the hardware interface does not
give access to the ready busy pin, then the function must not be defined
and the function pointer this->legacy.dev_ready is set to NULL.
Init function
-------------
The init function allocates memory and sets up all the board specific
parameters and function pointers. When everything is set up nand_scan()
is called. This function tries to detect and identify then chip. If a
chip is found all the internal data fields are initialized accordingly.
The structure(s) have to be zeroed out first and then filled with the
necessary information about the device.
::
static int __init board_init (void)
{
struct nand_chip *this;
int err = 0;
/* Allocate memory for MTD device structure and private data */
this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
if (!this) {
printk ("Unable to allocate NAND MTD device structure.\n");
err = -ENOMEM;
goto out;
}
board_mtd = nand_to_mtd(this);
/* map physical address */
baseaddr = ioremap(CHIP_PHYSICAL_ADDRESS, 1024);
if (!baseaddr) {
printk("Ioremap to access NAND chip failed\n");
err = -EIO;
goto out_mtd;
}
/* Set address of NAND IO lines */
this->legacy.IO_ADDR_R = baseaddr;
this->legacy.IO_ADDR_W = baseaddr;
/* Reference hardware control function */
this->hwcontrol = board_hwcontrol;
/* Set command delay time, see datasheet for correct value */
this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;
/* Assign the device ready function, if available */
this->legacy.dev_ready = board_dev_ready;
this->eccmode = NAND_ECC_SOFT;
/* Scan to find existence of the device */
if (nand_scan (this, 1)) {
err = -ENXIO;
goto out_ior;
}
add_mtd_partitions(board_mtd, partition_info, NUM_PARTITIONS);
goto out;
out_ior:
iounmap(baseaddr);
out_mtd:
kfree (this);
out:
return err;
}
module_init(board_init);
Exit function
-------------
The exit function is only necessary if the driver is compiled as a
module. It releases all resources which are held by the chip driver and
unregisters the partitions in the MTD layer.
::
#ifdef MODULE
static void __exit board_cleanup (void)
{
/* Unregister device */
WARN_ON(mtd_device_unregister(board_mtd));
/* Release resources */
nand_cleanup(mtd_to_nand(board_mtd));
/* unmap physical address */
iounmap(baseaddr);
/* Free the MTD device structure */
kfree (mtd_to_nand(board_mtd));
}
module_exit(board_cleanup);
#endif
Advanced board driver functions
===============================
This chapter describes the advanced functionality of the NAND driver.
For a list of functions which can be overridden by the board driver see
the documentation of the nand_chip structure.
Multiple chip control
---------------------
The nand driver can control chip arrays. Therefore the board driver must
provide an own select_chip function. This function must (de)select the
requested chip. The function pointer in the nand_chip structure must be
set before calling nand_scan(). The maxchip parameter of nand_scan()
defines the maximum number of chips to scan for. Make sure that the
select_chip function can handle the requested number of chips.
The nand driver concatenates the chips to one virtual chip and provides
this virtual chip to the MTD layer.
*Note: The driver can only handle linear chip arrays of equally sized
chips. There is no support for parallel arrays which extend the
buswidth.*
*GPIO based example*
::
static void board_select_chip (struct mtd_info *mtd, int chip)
{
/* Deselect all chips, set all nCE pins high */
GPIO(BOARD_NAND_NCE) |= 0xff;
if (chip >= 0)
GPIO(BOARD_NAND_NCE) &= ~ (1 << chip);
}
*Address lines based example.* Its assumed that the nCE pins are
connected to an address decoder.
::
static void board_select_chip (struct mtd_info *mtd, int chip)
{
struct nand_chip *this = mtd_to_nand(mtd);
/* Deselect all chips */
this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;
this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
switch (chip) {
case 0:
this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;
this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
break;
....
case n:
this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;
this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
break;
}
}
Hardware ECC support
--------------------
Functions and constants
~~~~~~~~~~~~~~~~~~~~~~~
The nand driver supports three different types of hardware ECC.
- NAND_ECC_HW3_256
Hardware ECC generator providing 3 bytes ECC per 256 byte.
- NAND_ECC_HW3_512
Hardware ECC generator providing 3 bytes ECC per 512 byte.
- NAND_ECC_HW6_512
Hardware ECC generator providing 6 bytes ECC per 512 byte.
- NAND_ECC_HW8_512
Hardware ECC generator providing 8 bytes ECC per 512 byte.
If your hardware generator has a different functionality add it at the
appropriate place in nand_base.c
The board driver must provide following functions:
- enable_hwecc
This function is called before reading / writing to the chip. Reset
or initialize the hardware generator in this function. The function
is called with an argument which let you distinguish between read and
write operations.
- calculate_ecc
This function is called after read / write from / to the chip.
Transfer the ECC from the hardware to the buffer. If the option
NAND_HWECC_SYNDROME is set then the function is only called on
write. See below.
- correct_data
In case of an ECC error this function is called for error detection
and correction. Return 1 respectively 2 in case the error can be
corrected. If the error is not correctable return -1. If your
hardware generator matches the default algorithm of the nand_ecc
software generator then use the correction function provided by
nand_ecc instead of implementing duplicated code.
Hardware ECC with syndrome calculation
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Many hardware ECC implementations provide Reed-Solomon codes and
calculate an error syndrome on read. The syndrome must be converted to a
standard Reed-Solomon syndrome before calling the error correction code
in the generic Reed-Solomon library.
The ECC bytes must be placed immediately after the data bytes in order
to make the syndrome generator work. This is contrary to the usual
layout used by software ECC. The separation of data and out of band area
is not longer possible. The nand driver code handles this layout and the
remaining free bytes in the oob area are managed by the autoplacement
code. Provide a matching oob-layout in this case. See rts_from4.c and
diskonchip.c for implementation reference. In those cases we must also
use bad block tables on FLASH, because the ECC layout is interfering
with the bad block marker positions. See bad block table support for
details.
Bad block table support
-----------------------
Most NAND chips mark the bad blocks at a defined position in the spare
area. Those blocks must not be erased under any circumstances as the bad
block information would be lost. It is possible to check the bad block
mark each time when the blocks are accessed by reading the spare area of
the first page in the block. This is time consuming so a bad block table
is used.
The nand driver supports various types of bad block tables.
- Per device
The bad block table contains all bad block information of the device
which can consist of multiple chips.
- Per chip
A bad block table is used per chip and contains the bad block
information for this particular chip.
- Fixed offset
The bad block table is located at a fixed offset in the chip
(device). This applies to various DiskOnChip devices.
- Automatic placed
The bad block table is automatically placed and detected either at
the end or at the beginning of a chip (device)
- Mirrored tables
The bad block table is mirrored on the chip (device) to allow updates
of the bad block table without data loss.
nand_scan() calls the function nand_default_bbt().
nand_default_bbt() selects appropriate default bad block table
descriptors depending on the chip information which was retrieved by
nand_scan().
The standard policy is scanning the device for bad blocks and build a
ram based bad block table which allows faster access than always
checking the bad block information on the flash chip itself.
Flash based tables
~~~~~~~~~~~~~~~~~~
It may be desired or necessary to keep a bad block table in FLASH. For
AG-AND chips this is mandatory, as they have no factory marked bad
blocks. They have factory marked good blocks. The marker pattern is
erased when the block is erased to be reused. So in case of powerloss
before writing the pattern back to the chip this block would be lost and
added to the bad blocks. Therefore we scan the chip(s) when we detect
them the first time for good blocks and store this information in a bad
block table before erasing any of the blocks.
The blocks in which the tables are stored are protected against
accidental access by marking them bad in the memory bad block table. The
bad block table management functions are allowed to circumvent this
protection.
The simplest way to activate the FLASH based bad block table support is
to set the option NAND_BBT_USE_FLASH in the bbt_option field of the
nand chip structure before calling nand_scan(). For AG-AND chips is
this done by default. This activates the default FLASH based bad block
table functionality of the NAND driver. The default bad block table
options are
- Store bad block table per chip
- Use 2 bits per block
- Automatic placement at the end of the chip
- Use mirrored tables with version numbers
- Reserve 4 blocks at the end of the chip
User defined tables
~~~~~~~~~~~~~~~~~~~
User defined tables are created by filling out a nand_bbt_descr
structure and storing the pointer in the nand_chip structure member
bbt_td before calling nand_scan(). If a mirror table is necessary a
second structure must be created and a pointer to this structure must be
stored in bbt_md inside the nand_chip structure. If the bbt_md member
is set to NULL then only the main table is used and no scan for the
mirrored table is performed.
The most important field in the nand_bbt_descr structure is the
options field. The options define most of the table properties. Use the
predefined constants from rawnand.h to define the options.
- Number of bits per block
The supported number of bits is 1, 2, 4, 8.
- Table per chip
Setting the constant NAND_BBT_PERCHIP selects that a bad block
table is managed for each chip in a chip array. If this option is not
set then a per device bad block table is used.
- Table location is absolute
Use the option constant NAND_BBT_ABSPAGE and define the absolute
page number where the bad block table starts in the field pages. If
you have selected bad block tables per chip and you have a multi chip
array then the start page must be given for each chip in the chip
array. Note: there is no scan for a table ident pattern performed, so
the fields pattern, veroffs, offs, len can be left uninitialized
- Table location is automatically detected
The table can either be located in the first or the last good blocks
of the chip (device). Set NAND_BBT_LASTBLOCK to place the bad block
table at the end of the chip (device). The bad block tables are
marked and identified by a pattern which is stored in the spare area
of the first page in the block which holds the bad block table. Store
a pointer to the pattern in the pattern field. Further the length of
the pattern has to be stored in len and the offset in the spare area
must be given in the offs member of the nand_bbt_descr structure.
For mirrored bad block tables different patterns are mandatory.
- Table creation
Set the option NAND_BBT_CREATE to enable the table creation if no
table can be found during the scan. Usually this is done only once if
a new chip is found.
- Table write support
Set the option NAND_BBT_WRITE to enable the table write support.
This allows the update of the bad block table(s) in case a block has
to be marked bad due to wear. The MTD interface function
block_markbad is calling the update function of the bad block table.
If the write support is enabled then the table is updated on FLASH.
Note: Write support should only be enabled for mirrored tables with
version control.
- Table version control
Set the option NAND_BBT_VERSION to enable the table version
control. It's highly recommended to enable this for mirrored tables
with write support. It makes sure that the risk of losing the bad
block table information is reduced to the loss of the information
about the one worn out block which should be marked bad. The version
is stored in 4 consecutive bytes in the spare area of the device. The
position of the version number is defined by the member veroffs in
the bad block table descriptor.
- Save block contents on write
In case that the block which holds the bad block table does contain
other useful information, set the option NAND_BBT_SAVECONTENT. When
the bad block table is written then the whole block is read the bad
block table is updated and the block is erased and everything is
written back. If this option is not set only the bad block table is
written and everything else in the block is ignored and erased.
- Number of reserved blocks
For automatic placement some blocks must be reserved for bad block
table storage. The number of reserved blocks is defined in the
maxblocks member of the bad block table description structure.
Reserving 4 blocks for mirrored tables should be a reasonable number.
This also limits the number of blocks which are scanned for the bad
block table ident pattern.
Spare area (auto)placement
--------------------------
The nand driver implements different possibilities for placement of
filesystem data in the spare area,
- Placement defined by fs driver
- Automatic placement
The default placement function is automatic placement. The nand driver
has built in default placement schemes for the various chiptypes. If due
to hardware ECC functionality the default placement does not fit then
the board driver can provide a own placement scheme.
File system drivers can provide a own placement scheme which is used
instead of the default placement scheme.
Placement schemes are defined by a nand_oobinfo structure
::
struct nand_oobinfo {
int useecc;
int eccbytes;
int eccpos[24];
int oobfree[8][2];
};
- useecc
The useecc member controls the ecc and placement function. The header
file include/mtd/mtd-abi.h contains constants to select ecc and
placement. MTD_NANDECC_OFF switches off the ecc complete. This is
not recommended and available for testing and diagnosis only.
MTD_NANDECC_PLACE selects caller defined placement,
MTD_NANDECC_AUTOPLACE selects automatic placement.
- eccbytes
The eccbytes member defines the number of ecc bytes per page.
- eccpos
The eccpos array holds the byte offsets in the spare area where the
ecc codes are placed.
- oobfree
The oobfree array defines the areas in the spare area which can be
used for automatic placement. The information is given in the format
{offset, size}. offset defines the start of the usable area, size the
length in bytes. More than one area can be defined. The list is
terminated by an {0, 0} entry.
Placement defined by fs driver
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The calling function provides a pointer to a nand_oobinfo structure
which defines the ecc placement. For writes the caller must provide a
spare area buffer along with the data buffer. The spare area buffer size
is (number of pages) \* (size of spare area). For reads the buffer size
is (number of pages) \* ((size of spare area) + (number of ecc steps per
page) \* sizeof (int)). The driver stores the result of the ecc check
for each tuple in the spare buffer. The storage sequence is::
<spare data page 0><ecc result 0>...<ecc result n>
...
<spare data page n><ecc result 0>...<ecc result n>
This is a legacy mode used by YAFFS1.
If the spare area buffer is NULL then only the ECC placement is done
according to the given scheme in the nand_oobinfo structure.
Automatic placement
~~~~~~~~~~~~~~~~~~~
Automatic placement uses the built in defaults to place the ecc bytes in
the spare area. If filesystem data have to be stored / read into the
spare area then the calling function must provide a buffer. The buffer
size per page is determined by the oobfree array in the nand_oobinfo
structure.
If the spare area buffer is NULL then only the ECC placement is done
according to the default builtin scheme.
Spare area autoplacement default schemes
----------------------------------------
256 byte pagesize
~~~~~~~~~~~~~~~~~
======== ================== ===================================================
Offset Content Comment
======== ================== ===================================================
0x00 ECC byte 0 Error correction code byte 0
0x01 ECC byte 1 Error correction code byte 1
0x02 ECC byte 2 Error correction code byte 2
0x03 Autoplace 0
0x04 Autoplace 1
0x05 Bad block marker If any bit in this byte is zero, then this
block is bad. This applies only to the first
page in a block. In the remaining pages this
byte is reserved
0x06 Autoplace 2
0x07 Autoplace 3
======== ================== ===================================================
512 byte pagesize
~~~~~~~~~~~~~~~~~
============= ================== ==============================================
Offset Content Comment
============= ================== ==============================================
0x00 ECC byte 0 Error correction code byte 0 of the lower
256 Byte data in this page
0x01 ECC byte 1 Error correction code byte 1 of the lower
256 Bytes of data in this page
0x02 ECC byte 2 Error correction code byte 2 of the lower
256 Bytes of data in this page
0x03 ECC byte 3 Error correction code byte 0 of the upper
256 Bytes of data in this page
0x04 reserved reserved
0x05 Bad block marker If any bit in this byte is zero, then this
block is bad. This applies only to the first
page in a block. In the remaining pages this
byte is reserved
0x06 ECC byte 4 Error correction code byte 1 of the upper
256 Bytes of data in this page
0x07 ECC byte 5 Error correction code byte 2 of the upper
256 Bytes of data in this page
0x08 - 0x0F Autoplace 0 - 7
============= ================== ==============================================
2048 byte pagesize
~~~~~~~~~~~~~~~~~~
=========== ================== ================================================
Offset Content Comment
=========== ================== ================================================
0x00 Bad block marker If any bit in this byte is zero, then this block
is bad. This applies only to the first page in a
block. In the remaining pages this byte is
reserved
0x01 Reserved Reserved
0x02-0x27 Autoplace 0 - 37
0x28 ECC byte 0 Error correction code byte 0 of the first
256 Byte data in this page
0x29 ECC byte 1 Error correction code byte 1 of the first
256 Bytes of data in this page
0x2A ECC byte 2 Error correction code byte 2 of the first
256 Bytes data in this page
0x2B ECC byte 3 Error correction code byte 0 of the second
256 Bytes of data in this page
0x2C ECC byte 4 Error correction code byte 1 of the second
256 Bytes of data in this page
0x2D ECC byte 5 Error correction code byte 2 of the second
256 Bytes of data in this page
0x2E ECC byte 6 Error correction code byte 0 of the third
256 Bytes of data in this page
0x2F ECC byte 7 Error correction code byte 1 of the third
256 Bytes of data in this page
0x30 ECC byte 8 Error correction code byte 2 of the third
256 Bytes of data in this page
0x31 ECC byte 9 Error correction code byte 0 of the fourth
256 Bytes of data in this page
0x32 ECC byte 10 Error correction code byte 1 of the fourth
256 Bytes of data in this page
0x33 ECC byte 11 Error correction code byte 2 of the fourth
256 Bytes of data in this page
0x34 ECC byte 12 Error correction code byte 0 of the fifth
256 Bytes of data in this page
0x35 ECC byte 13 Error correction code byte 1 of the fifth
256 Bytes of data in this page
0x36 ECC byte 14 Error correction code byte 2 of the fifth
256 Bytes of data in this page
0x37 ECC byte 15 Error correction code byte 0 of the sixth
256 Bytes of data in this page
0x38 ECC byte 16 Error correction code byte 1 of the sixth
256 Bytes of data in this page
0x39 ECC byte 17 Error correction code byte 2 of the sixth
256 Bytes of data in this page
0x3A ECC byte 18 Error correction code byte 0 of the seventh
256 Bytes of data in this page
0x3B ECC byte 19 Error correction code byte 1 of the seventh
256 Bytes of data in this page
0x3C ECC byte 20 Error correction code byte 2 of the seventh
256 Bytes of data in this page
0x3D ECC byte 21 Error correction code byte 0 of the eighth
256 Bytes of data in this page
0x3E ECC byte 22 Error correction code byte 1 of the eighth
256 Bytes of data in this page
0x3F ECC byte 23 Error correction code byte 2 of the eighth
256 Bytes of data in this page
=========== ================== ================================================
Filesystem support
==================
The NAND driver provides all necessary functions for a filesystem via
the MTD interface.
Filesystems must be aware of the NAND peculiarities and restrictions.
One major restrictions of NAND Flash is, that you cannot write as often
as you want to a page. The consecutive writes to a page, before erasing
it again, are restricted to 1-3 writes, depending on the manufacturers
specifications. This applies similar to the spare area.
Therefore NAND aware filesystems must either write in page size chunks
or hold a writebuffer to collect smaller writes until they sum up to
pagesize. Available NAND aware filesystems: JFFS2, YAFFS.
The spare area usage to store filesystem data is controlled by the spare
area placement functionality which is described in one of the earlier
chapters.
Tools
=====
The MTD project provides a couple of helpful tools to handle NAND Flash.
- flasherase, flasheraseall: Erase and format FLASH partitions
- nandwrite: write filesystem images to NAND FLASH
- nanddump: dump the contents of a NAND FLASH partitions
These tools are aware of the NAND restrictions. Please use those tools
instead of complaining about errors which are caused by non NAND aware
access methods.
Constants
=========
This chapter describes the constants which might be relevant for a
driver developer.
Chip option constants
---------------------
Constants for chip id table
~~~~~~~~~~~~~~~~~~~~~~~~~~~
These constants are defined in rawnand.h. They are OR-ed together to
describe the chip functionality::
/* Buswitdh is 16 bit */
#define NAND_BUSWIDTH_16 0x00000002
/* Device supports partial programming without padding */
#define NAND_NO_PADDING 0x00000004
/* Chip has cache program function */
#define NAND_CACHEPRG 0x00000008
/* Chip has copy back function */
#define NAND_COPYBACK 0x00000010
/* AND Chip which has 4 banks and a confusing page / block
* assignment. See Renesas datasheet for further information */
#define NAND_IS_AND 0x00000020
/* Chip has a array of 4 pages which can be read without
* additional ready /busy waits */
#define NAND_4PAGE_ARRAY 0x00000040
Constants for runtime options
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
These constants are defined in rawnand.h. They are OR-ed together to
describe the functionality::
/* The hw ecc generator provides a syndrome instead a ecc value on read
* This can only work if we have the ecc bytes directly behind the
* data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
#define NAND_HWECC_SYNDROME 0x00020000
ECC selection constants
-----------------------
Use these constants to select the ECC algorithm::
/* No ECC. Usage is not recommended ! */
#define NAND_ECC_NONE 0
/* Software ECC 3 byte ECC per 256 Byte data */
#define NAND_ECC_SOFT 1
/* Hardware ECC 3 byte ECC per 256 Byte data */
#define NAND_ECC_HW3_256 2
/* Hardware ECC 3 byte ECC per 512 Byte data */
#define NAND_ECC_HW3_512 3
/* Hardware ECC 6 byte ECC per 512 Byte data */
#define NAND_ECC_HW6_512 4
/* Hardware ECC 8 byte ECC per 512 Byte data */
#define NAND_ECC_HW8_512 6
Hardware control related constants
----------------------------------
These constants describe the requested hardware access function when the
boardspecific hardware control function is called::
/* Select the chip by setting nCE to low */
#define NAND_CTL_SETNCE 1
/* Deselect the chip by setting nCE to high */
#define NAND_CTL_CLRNCE 2
/* Select the command latch by setting CLE to high */
#define NAND_CTL_SETCLE 3
/* Deselect the command latch by setting CLE to low */
#define NAND_CTL_CLRCLE 4
/* Select the address latch by setting ALE to high */
#define NAND_CTL_SETALE 5
/* Deselect the address latch by setting ALE to low */
#define NAND_CTL_CLRALE 6
/* Set write protection by setting WP to high. Not used! */
#define NAND_CTL_SETWP 7
/* Clear write protection by setting WP to low. Not used! */
#define NAND_CTL_CLRWP 8
Bad block table related constants
---------------------------------
These constants describe the options used for bad block table
descriptors::
/* Options for the bad block table descriptors */
/* The number of bits used per block in the bbt on the device */
#define NAND_BBT_NRBITS_MSK 0x0000000F
#define NAND_BBT_1BIT 0x00000001
#define NAND_BBT_2BIT 0x00000002
#define NAND_BBT_4BIT 0x00000004
#define NAND_BBT_8BIT 0x00000008
/* The bad block table is in the last good block of the device */
#define NAND_BBT_LASTBLOCK 0x00000010
/* The bbt is at the given page, else we must scan for the bbt */
#define NAND_BBT_ABSPAGE 0x00000020
/* bbt is stored per chip on multichip devices */
#define NAND_BBT_PERCHIP 0x00000080
/* bbt has a version counter at offset veroffs */
#define NAND_BBT_VERSION 0x00000100
/* Create a bbt if none axists */
#define NAND_BBT_CREATE 0x00000200
/* Write bbt if necessary */
#define NAND_BBT_WRITE 0x00001000
/* Read and write back block contents when writing bbt */
#define NAND_BBT_SAVECONTENT 0x00002000
Structures
==========
This chapter contains the autogenerated documentation of the structures
which are used in the NAND driver and might be relevant for a driver
developer. Each struct member has a short description which is marked
with an [XXX] identifier. See the chapter "Documentation hints" for an
explanation.
.. kernel-doc:: include/linux/mtd/rawnand.h
:internal:
Public Functions Provided
=========================
This chapter contains the autogenerated documentation of the NAND kernel
API functions which are exported. Each function has a short description
which is marked with an [XXX] identifier. See the chapter "Documentation
hints" for an explanation.
.. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
:export:
Internal Functions Provided
===========================
This chapter contains the autogenerated documentation of the NAND driver
internal functions. Each function has a short description which is
marked with an [XXX] identifier. See the chapter "Documentation hints"
for an explanation. The functions marked with [DEFAULT] might be
relevant for a board driver developer.
.. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
:internal:
.. kernel-doc:: drivers/mtd/nand/raw/nand_bbt.c
:internal:
Credits
=======
The following people have contributed to the NAND driver:
1. Steven J. Hill\ [email protected]
2. David Woodhouse\ [email protected]
3. Thomas Gleixner\ [email protected]
A lot of users have provided bugfixes, improvements and helping hands
for testing. Thanks a lot.
The following people have contributed to this document:
1. Thomas Gleixner\ [email protected]
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
MTD NAND interface와 문서 표기
1-29Thomas Gleixner가 작성한 이 문서는 Linux kernel의 generic NAND driver programming interface를 설명합니다.
Generic driver는 거의 모든 NAND와 AG-AND chip을 지원하고 Linux MTD subsystem에 연결합니다. NAND용 board driver 또는 filesystem driver를 구현하려는 개발자를 대상으로 합니다.
알려진 bug나 assumption은 없습니다.
Function과 structure 문서는 자동 생성됩니다. 각 function과 member의 짧은 설명에 붙은 `[XXX]` identifier의 의미를 뒤 절에서 설명합니다.
Board hardware와 generic NAND core, MTD API, filesystem을 연결합니다.
=====================================
MTD NAND Driver Programming Interface
=====================================
:Author: Thomas Gleixner
Introduction
============
The generic NAND driver supports almost all NAND and AG-AND based chips
and connects them to the Memory Technology Devices (MTD) subsystem of
the Linux Kernel.
This documentation is provided for developers who want to implement
board drivers or filesystem drivers suitable for NAND devices.
Known Bugs And Assumptions
==========================
None.
Documentation hints
===================
The function and structure docs are autogenerated. Each function and
struct member has a short description which is marked with an [XXX]
identifier. The following chapters explain the meaning of those
identifiers.
Function·struct member identifier
30-96Function identifier는 API의 사용 범위와 교체 가능성을 나타냅니다.
`[MTD Interface]`는 MTD kernel API를 제공하며 hardware와 완전히 독립적이고 교체할 수 없습니다. `[NAND Interface]`는 export된 NAND kernel API입니다. `[GENERIC]`도 hardware-independent이며 교체할 수 없습니다.
`[DEFAULT]`는 대부분의 구현에 맞는 hardware-related 기본 함수입니다. Board driver는 `nand_scan()` 전에 `nand_chip` function pointer를 board-specific 구현으로 설정할 수 있습니다. NULL이면 scan 중 감지된 chip에 맞는 default function이 채워집니다.
Struct member의 `[INTERN]`은 NAND 내부 전용이며 수정하면 안 됩니다. 대부분 `nand_scan()`이 chip geometry에서 계산합니다.
`[REPLACEABLE]`은 board driver가 scan 전에 대체할 수 있는 hardware function입니다. `[BOARDSPECIFIC]`은 board driver가 반드시 function pointer와 data field를 설정해야 합니다. `[OPTIONAL]`은 board driver에는 유용할 수 있지만 generic core가 사용하지 않는 정보입니다.
Function identifiers [XXX]
--------------------------
The functions are marked with [XXX] identifiers in the short comment.
The identifiers explain the usage and scope of the functions. Following
identifiers are used:
- [MTD Interface]
These functions provide the interface to the MTD kernel API. They are
not replaceable and provide functionality which is complete hardware
independent.
- [NAND Interface]
These functions are exported and provide the interface to the NAND
kernel API.
- [GENERIC]
Generic functions are not replaceable and provide functionality which
is complete hardware independent.
- [DEFAULT]
Default functions provide hardware related functionality which is
suitable for most of the implementations. These functions can be
replaced by the board driver if necessary. Those functions are called
via pointers in the NAND chip description structure. The board driver
can set the functions which should be replaced by board dependent
functions before calling nand_scan(). If the function pointer is
NULL on entry to nand_scan() then the pointer is set to the default
function which is suitable for the detected chip type.
Struct member identifiers [XXX]
-------------------------------
The struct members are marked with [XXX] identifiers in the comment. The
identifiers explain the usage and scope of the members. Following
identifiers are used:
- [INTERN]
These members are for NAND driver internal use only and must not be
modified. Most of these values are calculated from the chip geometry
information which is evaluated during nand_scan().
- [REPLACEABLE]
Replaceable members hold hardware related functions which can be
provided by the board driver. The board driver can set the functions
which should be replaced by board dependent functions before calling
nand_scan(). If the function pointer is NULL on entry to
nand_scan() then the pointer is set to the default function which is
suitable for the detected chip type.
- [BOARDSPECIFIC]
Board specific members hold hardware related information which must
be provided by the board driver. The board driver must set the
function pointers and datafields before calling nand_scan().
- [OPTIONAL]
Optional members can hold information relevant for the board driver.
The generic NAND driver code does not use this information.
기본 `nand_chip`와 partition
97-148대부분의 board는 기본 function과 `nand_chip`의 board-dependent member만 제공하면 됩니다.
최소한 `nand_chip` structure와 `ioremap()`된 chip address 저장소가 필요합니다. Structure는 `kmalloc()`로 동적 할당하거나 static으로 둘 수 있습니다.
`nand_chip`은 MTD subsystem에 등록될 `mtd_info`를 내장합니다. `nand_to_mtd()` helper로 `nand_chip` pointer에서 MTD pointer를 얻습니다.
Device를 partition으로 나누려면 board에 맞는 `mtd_partition` array를 정의합니다. 예시는 첫 8 MiB partition과 `MTDPART_OFS_NEXT`, `MTDPART_SIZ_FULL`을 사용한 나머지 전체 partition입니다.
Basic board driver
==================
For most boards it will be sufficient to provide just the basic
functions and fill out some really board dependent members in the nand
chip description structure.
Basic defines
-------------
At least you have to provide a nand_chip structure and a storage for
the ioremap'ed chip address. You can allocate the nand_chip structure
using kmalloc or you can allocate it statically. The NAND chip structure
embeds an mtd structure which will be registered to the MTD subsystem.
You can extract a pointer to the mtd structure from a nand_chip pointer
using the nand_to_mtd() helper.
Kmalloc based example
::
static struct mtd_info *board_mtd;
static void __iomem *baseaddr;
Static example
::
static struct nand_chip board_chip;
static void __iomem *baseaddr;
Partition defines
-----------------
If you want to divide your device into partitions, then define a
partitioning scheme suitable to your board.
::
#define NUM_PARTITIONS 2
static struct mtd_partition partition_info[] = {
{ .name = "Flash partition 1",
.offset = 0,
.size = 8 * 1024 * 1024 },
{ .name = "Flash partition 2",
.offset = MTDPART_OFS_NEXT,
.size = MTDPART_SIZ_FULL },
};
Hardware control과 ready/busy
149-201Hardware control function은 NAND chip의 CLE, ALE, nCE control pin에 접근합니다. GPIO 또는 address line으로 구현할 수 있으며 address line을 쓰면 timing requirement를 지켜야 합니다.
GPIO 예시는 `NAND_CTL_SETCLE/CLRCLE`, `SETALE/CLRALE`, `SETNCE/CLRNCE` command에 따라 pin을 전환합니다.
Address-line 방식은 chip select decoder가 nCE를 구동한다고 가정하고 `mtd_to_nand()`로 chip을 얻은 뒤 `IO_ADDR_W`의 CLE/ALE address bit를 set·clear합니다.
Ready/busy pin이 접근 가능한 GPIO나 I/O에 연결됐다면 `dev_ready`가 pin 상태를 읽습니다. R/B low인 busy는 0, high인 ready는 1을 반환합니다. Pin에 접근할 수 없다면 function을 정의하지 않고 `this->legacy.dev_ready = NULL`로 둡니다.
Hardware control function
-------------------------
The hardware control function provides access to the control pins of the
NAND chip(s). The access can be done by GPIO pins or by address lines.
If you use address lines, make sure that the timing requirements are
met.
*GPIO based example*
::
static void board_hwcontrol(struct mtd_info *mtd, int cmd)
{
switch(cmd){
case NAND_CTL_SETCLE: /* Set CLE pin high */ break;
case NAND_CTL_CLRCLE: /* Set CLE pin low */ break;
case NAND_CTL_SETALE: /* Set ALE pin high */ break;
case NAND_CTL_CLRALE: /* Set ALE pin low */ break;
case NAND_CTL_SETNCE: /* Set nCE pin low */ break;
case NAND_CTL_CLRNCE: /* Set nCE pin high */ break;
}
}
*Address lines based example.* It's assumed that the nCE pin is driven
by a chip select decoder.
::
static void board_hwcontrol(struct mtd_info *mtd, int cmd)
{
struct nand_chip *this = mtd_to_nand(mtd);
switch(cmd){
case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break;
case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break;
case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break;
case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break;
}
}
Device ready function
---------------------
If the hardware interface has the ready busy pin of the NAND chip
connected to a GPIO or other accessible I/O pin, this function is used
to read back the state of the pin. The function has no arguments and
should return 0, if the device is busy (R/B pin is low) and 1, if the
device is ready (R/B pin is high). If the hardware interface does not
give access to the ready busy pin, then the function must not be defined
and the function pointer this->legacy.dev_ready is set to NULL.
Board driver 초기화
202-266Init function은 memory를 할당하고 board-specific parameter와 function pointer를 설정한 뒤 `nand_scan()`을 호출합니다. Scan은 chip을 감지·식별하고 geometry에 맞춰 internal field를 초기화합니다.
Structure는 먼저 zero-initialize한 뒤 필요한 정보를 채웁니다. 예시는 `kzalloc()`으로 `nand_chip`을 만들고 `nand_to_mtd()`로 MTD pointer를 얻습니다.
Physical NAND address를 `ioremap()`하고 `IO_ADDR_R/W`, `board_hwcontrol`, datasheet 기반 `chip_delay`, optional `board_dev_ready`, `NAND_ECC_SOFT`를 설정합니다.
`nand_scan(this, 1)`이 성공하면 `add_mtd_partitions()`로 partition을 등록합니다. 실패 경로는 `iounmap()`과 `kfree()`를 역순으로 수행합니다. `module_init(board_init)`가 init entry를 등록합니다.
할당과 mapping 후 chip을 scan하고 MTD partition을 등록합니다.
Init function
-------------
The init function allocates memory and sets up all the board specific
parameters and function pointers. When everything is set up nand_scan()
is called. This function tries to detect and identify then chip. If a
chip is found all the internal data fields are initialized accordingly.
The structure(s) have to be zeroed out first and then filled with the
necessary information about the device.
::
static int __init board_init (void)
{
struct nand_chip *this;
int err = 0;
/* Allocate memory for MTD device structure and private data */
this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
if (!this) {
printk ("Unable to allocate NAND MTD device structure.\n");
err = -ENOMEM;
goto out;
}
board_mtd = nand_to_mtd(this);
/* map physical address */
baseaddr = ioremap(CHIP_PHYSICAL_ADDRESS, 1024);
if (!baseaddr) {
printk("Ioremap to access NAND chip failed\n");
err = -EIO;
goto out_mtd;
}
/* Set address of NAND IO lines */
this->legacy.IO_ADDR_R = baseaddr;
this->legacy.IO_ADDR_W = baseaddr;
/* Reference hardware control function */
this->hwcontrol = board_hwcontrol;
/* Set command delay time, see datasheet for correct value */
this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;
/* Assign the device ready function, if available */
this->legacy.dev_ready = board_dev_ready;
this->eccmode = NAND_ECC_SOFT;
/* Scan to find existence of the device */
if (nand_scan (this, 1)) {
err = -ENXIO;
goto out_ior;
}
add_mtd_partitions(board_mtd, partition_info, NUM_PARTITIONS);
goto out;
out_ior:
iounmap(baseaddr);
out_mtd:
kfree (this);
out:
return err;
}
module_init(board_init);
Module 종료와 resource 해제
267-293Exit function은 driver를 module로 빌드할 때만 필요합니다. Chip driver가 보유한 resource를 해제하고 MTD partition을 unregister합니다.
`mtd_device_unregister()` 후 `nand_cleanup()`을 호출하고 physical address를 `iounmap()`한 뒤 `nand_chip`을 `kfree()`합니다. `module_exit(board_cleanup)`이 cleanup entry를 등록합니다.
등록과 할당의 역순으로 resource를 정리합니다.
Exit function
-------------
The exit function is only necessary if the driver is compiled as a
module. It releases all resources which are held by the chip driver and
unregisters the partitions in the MTD layer.
::
#ifdef MODULE
static void __exit board_cleanup (void)
{
/* Unregister device */
WARN_ON(mtd_device_unregister(board_mtd));
/* Release resources */
nand_cleanup(mtd_to_nand(board_mtd));
/* unmap physical address */
iounmap(baseaddr);
/* Free the MTD device structure */
kfree (mtd_to_nand(board_mtd));
}
module_exit(board_cleanup);
#endif
Advanced multi-chip control
294-356Advanced function 중 board driver가 override할 수 있는 목록은 `nand_chip` 문서에서 확인합니다.
NAND driver는 chip array를 제어할 수 있으므로 board driver가 requested chip을 select/deselect하는 `select_chip()`을 제공해야 합니다. Pointer는 `nand_scan()` 전에 설정하고 scan의 `maxchip`은 탐색할 최대 chip 수를 정합니다.
Driver는 여러 chip을 하나의 virtual chip으로 concatenate해 MTD layer에 제공합니다.
지원 범위는 같은 크기의 chip으로 구성된 linear array뿐입니다. Bus width를 확장하는 parallel array는 지원하지 않습니다.
GPIO 예시는 모든 nCE를 high로 deselect한 뒤 선택한 bit만 low로 내립니다. Address decoder 방식은 `IO_ADDR_R/W`의 mask를 지우고 chip별 address를 set합니다.
Board selector가 physical chip을 전환하고 core가 하나의 linear MTD로 합칩니다.
Advanced board driver functions
===============================
This chapter describes the advanced functionality of the NAND driver.
For a list of functions which can be overridden by the board driver see
the documentation of the nand_chip structure.
Multiple chip control
---------------------
The nand driver can control chip arrays. Therefore the board driver must
provide an own select_chip function. This function must (de)select the
requested chip. The function pointer in the nand_chip structure must be
set before calling nand_scan(). The maxchip parameter of nand_scan()
defines the maximum number of chips to scan for. Make sure that the
select_chip function can handle the requested number of chips.
The nand driver concatenates the chips to one virtual chip and provides
this virtual chip to the MTD layer.
*Note: The driver can only handle linear chip arrays of equally sized
chips. There is no support for parallel arrays which extend the
buswidth.*
*GPIO based example*
::
static void board_select_chip (struct mtd_info *mtd, int chip)
{
/* Deselect all chips, set all nCE pins high */
GPIO(BOARD_NAND_NCE) |= 0xff;
if (chip >= 0)
GPIO(BOARD_NAND_NCE) &= ~ (1 << chip);
}
*Address lines based example.* Its assumed that the nCE pins are
connected to an address decoder.
::
static void board_select_chip (struct mtd_info *mtd, int chip)
{
struct nand_chip *this = mtd_to_nand(mtd);
/* Deselect all chips */
this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK;
this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK;
switch (chip) {
case 0:
this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;
this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
break;
....
case n:
this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;
this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
break;
}
}
Hardware ECC 종류와 callback
357-408문서는 네 hardware ECC format을 열거합니다. `NAND_ECC_HW3_256`은 256 byte마다 3 ECC byte, `NAND_ECC_HW3_512`는 512 byte마다 3 byte, `NAND_ECC_HW6_512`는 512 byte마다 6 byte, `NAND_ECC_HW8_512`는 512 byte마다 8 byte를 생성합니다.
다른 기능의 generator는 `nand_base.c`의 적절한 위치에 추가해야 합니다.
Board driver는 read/write 전에 generator를 reset 또는 initialize하는 `enable_hwecc`, 전송 후 hardware ECC를 buffer로 옮기는 `calculate_ecc`, 오류를 검출·정정하는 `correct_data`를 제공합니다.
`NAND_HWECC_SYNDROME`이면 `calculate_ecc`는 write에서만 호출됩니다. `correct_data`는 정정 가능할 때 1 또는 2, 불가능하면 -1을 반환합니다. Hardware algorithm이 software `nand_ecc`와 같으면 중복 구현 대신 기존 correction function을 사용합니다.
Hardware ECC support
--------------------
Functions and constants
~~~~~~~~~~~~~~~~~~~~~~~
The nand driver supports three different types of hardware ECC.
- NAND_ECC_HW3_256
Hardware ECC generator providing 3 bytes ECC per 256 byte.
- NAND_ECC_HW3_512
Hardware ECC generator providing 3 bytes ECC per 512 byte.
- NAND_ECC_HW6_512
Hardware ECC generator providing 6 bytes ECC per 512 byte.
- NAND_ECC_HW8_512
Hardware ECC generator providing 8 bytes ECC per 512 byte.
If your hardware generator has a different functionality add it at the
appropriate place in nand_base.c
The board driver must provide following functions:
- enable_hwecc
This function is called before reading / writing to the chip. Reset
or initialize the hardware generator in this function. The function
is called with an argument which let you distinguish between read and
write operations.
- calculate_ecc
This function is called after read / write from / to the chip.
Transfer the ECC from the hardware to the buffer. If the option
NAND_HWECC_SYNDROME is set then the function is only called on
write. See below.
- correct_data
In case of an ECC error this function is called for error detection
and correction. Return 1 respectively 2 in case the error can be
corrected. If the error is not correctable return -1. If your
hardware generator matches the default algorithm of the nand_ecc
software generator then use the correction function provided by
nand_ecc instead of implementing duplicated code.
Reed-Solomon syndrome ECC
409-427많은 hardware ECC 구현은 Reed-Solomon code를 제공하고 read 시 error syndrome을 계산합니다. Generic Reed-Solomon library의 correction code를 호출하기 전에 standard syndrome으로 변환해야 합니다.
Syndrome generator가 동작하려면 ECC byte를 data byte 바로 뒤에 배치해야 하므로 software ECC의 일반 layout과 반대입니다. Data와 OOB area를 분리할 수 없습니다.
NAND core가 이 layout을 처리하고 남은 OOB free byte는 autoplacement가 관리합니다. Matching OOB layout을 제공해야 하며 `rts_from4.c`, `diskonchip.c`를 참고할 수 있습니다.
ECC layout이 bad-block marker 위치와 충돌하므로 이런 구현은 flash-based bad block table도 사용해야 합니다.
Data 직후 ECC를 배치하고 남은 OOB와 bad-block 정보를 별도 정책으로 관리합니다.
Hardware ECC with syndrome calculation
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Many hardware ECC implementations provide Reed-Solomon codes and
calculate an error syndrome on read. The syndrome must be converted to a
standard Reed-Solomon syndrome before calling the error correction code
in the generic Reed-Solomon library.
The ECC bytes must be placed immediately after the data bytes in order
to make the syndrome generator work. This is contrary to the usual
layout used by software ECC. The separation of data and out of band area
is not longer possible. The nand driver code handles this layout and the
remaining free bytes in the oob area are managed by the autoplacement
code. Provide a matching oob-layout in this case. See rts_from4.c and
diskonchip.c for implementation reference. In those cases we must also
use bad block tables on FLASH, because the ECC layout is interfering
with the bad block marker positions. See bad block table support for
details.
Bad block table 종류와 기본 정책
428-473대부분의 NAND chip은 spare area의 정해진 위치에 bad block을 표시합니다. 표시가 사라지므로 이 block은 어떤 경우에도 erase하면 안 됩니다.
Block 접근 때마다 첫 page의 spare marker를 읽는 것은 느리므로 bad block table, BBT를 사용합니다.
BBT는 전체 multi-chip device 단위 또는 chip별로 둘 수 있고, fixed offset에 배치하거나 chip 앞·뒤의 good block에서 자동 탐지할 수 있습니다. Update 중 data loss를 막기 위한 mirrored table도 지원합니다.
`nand_scan()`은 `nand_default_bbt()`를 호출하고 감지한 chip 정보에 따라 default descriptor를 선택합니다. 표준 정책은 device를 scan해 RAM BBT를 만들고 매번 flash marker를 확인하는 비용을 줄이는 것입니다.
Bad block table support
-----------------------
Most NAND chips mark the bad blocks at a defined position in the spare
area. Those blocks must not be erased under any circumstances as the bad
block information would be lost. It is possible to check the bad block
mark each time when the blocks are accessed by reading the spare area of
the first page in the block. This is time consuming so a bad block table
is used.
The nand driver supports various types of bad block tables.
- Per device
The bad block table contains all bad block information of the device
which can consist of multiple chips.
- Per chip
A bad block table is used per chip and contains the bad block
information for this particular chip.
- Fixed offset
The bad block table is located at a fixed offset in the chip
(device). This applies to various DiskOnChip devices.
- Automatic placed
The bad block table is automatically placed and detected either at
the end or at the beginning of a chip (device)
- Mirrored tables
The bad block table is mirrored on the chip (device) to allow updates
of the bad block table without data loss.
nand_scan() calls the function nand_default_bbt().
nand_default_bbt() selects appropriate default bad block table
descriptors depending on the chip information which was retrieved by
nand_scan().
The standard policy is scanning the device for bad blocks and build a
ram based bad block table which allows faster access than always
checking the bad block information on the flash chip itself.
Flash-based bad block table
474-507BBT를 flash에 보관해야 할 수 있습니다. AG-AND는 factory bad marker 대신 good-block marker를 사용하고 block erase 시 marker가 지워지므로 flash BBT가 필수입니다.
최초 감지 시 erase 전에 good block을 scan해 BBT에 저장합니다. Power loss로 marker를 다시 쓰지 못해 good block이 사라지는 문제를 방지합니다.
Table 저장 block은 RAM BBT에서 bad로 표시해 accidental access를 막지만 BBT management function은 이 보호를 우회할 수 있습니다.
`nand_scan()` 전 `nand_chip.bbt_option`에 `NAND_BBT_USE_FLASH`를 set하면 default flash BBT가 활성화됩니다. AG-AND에는 기본 적용됩니다.
Default는 chip별 table, block당 2 bit, chip 끝 자동 배치, version이 있는 mirror, 끝의 4 block reserve입니다.
Flash based tables
~~~~~~~~~~~~~~~~~~
It may be desired or necessary to keep a bad block table in FLASH. For
AG-AND chips this is mandatory, as they have no factory marked bad
blocks. They have factory marked good blocks. The marker pattern is
erased when the block is erased to be reused. So in case of powerloss
before writing the pattern back to the chip this block would be lost and
added to the bad blocks. Therefore we scan the chip(s) when we detect
them the first time for good blocks and store this information in a bad
block table before erasing any of the blocks.
The blocks in which the tables are stored are protected against
accidental access by marking them bad in the memory bad block table. The
bad block table management functions are allowed to circumvent this
protection.
The simplest way to activate the FLASH based bad block table support is
to set the option NAND_BBT_USE_FLASH in the bbt_option field of the
nand chip structure before calling nand_scan(). For AG-AND chips is
this done by default. This activates the default FLASH based bad block
table functionality of the NAND driver. The default bad block table
options are
- Store bad block table per chip
- Use 2 bits per block
- Automatic placement at the end of the chip
- Use mirrored tables with version numbers
- Reserve 4 blocks at the end of the chip
User-defined BBT descriptor
508-599User-defined table은 `nand_bbt_descr`를 채우고 `nand_scan()` 전 `nand_chip.bbt_td`에 main descriptor pointer를 저장합니다. Mirror가 필요하면 두 번째 descriptor를 `bbt_md`에 둡니다. NULL이면 mirror를 scan하지 않습니다.
핵심 `options` field는 `rawnand.h` constant를 OR해 table property를 정의합니다. Block당 1, 2, 4, 8 bit를 지원합니다.
`NAND_BBT_PERCHIP`은 chip별 table을 선택합니다. `NAND_BBT_ABSPAGE`는 `pages`에 absolute start page를 주며 ident pattern scan을 하지 않으므로 `pattern`, `veroffs`, `offs`, `len`은 초기화하지 않아도 됩니다.
Automatic location은 첫 또는 마지막 good block을 사용합니다. `NAND_BBT_LASTBLOCK`은 끝 배치입니다. 첫 page spare area의 `pattern`, `len`, `offs`로 table을 식별하며 mirror에는 서로 다른 pattern이 필요합니다.
`NAND_BBT_CREATE`는 scan에서 table을 못 찾았을 때 생성합니다. `NAND_BBT_WRITE`는 wear로 새 bad block이 생길 때 flash table update를 허용합니다. Write는 version-controlled mirror에서만 권장됩니다.
`NAND_BBT_VERSION`은 spare area의 `veroffs`부터 연속 4 byte에 version을 저장해 최신 mirror를 식별하고 손실 범위를 새 worn block 하나로 제한합니다.
`NAND_BBT_SAVECONTENT`는 BBT block의 다른 data도 읽어 보존한 뒤 erase와 write-back을 수행합니다. 없으면 BBT 외 내용은 erase됩니다.
Automatic placement용 reserve 수는 `maxblocks`이며 mirrored table에는 4 block이 합리적입니다. 이 값은 ident pattern scan 범위도 제한합니다.
User defined tables
~~~~~~~~~~~~~~~~~~~
User defined tables are created by filling out a nand_bbt_descr
structure and storing the pointer in the nand_chip structure member
bbt_td before calling nand_scan(). If a mirror table is necessary a
second structure must be created and a pointer to this structure must be
stored in bbt_md inside the nand_chip structure. If the bbt_md member
is set to NULL then only the main table is used and no scan for the
mirrored table is performed.
The most important field in the nand_bbt_descr structure is the
options field. The options define most of the table properties. Use the
predefined constants from rawnand.h to define the options.
- Number of bits per block
The supported number of bits is 1, 2, 4, 8.
- Table per chip
Setting the constant NAND_BBT_PERCHIP selects that a bad block
table is managed for each chip in a chip array. If this option is not
set then a per device bad block table is used.
- Table location is absolute
Use the option constant NAND_BBT_ABSPAGE and define the absolute
page number where the bad block table starts in the field pages. If
you have selected bad block tables per chip and you have a multi chip
array then the start page must be given for each chip in the chip
array. Note: there is no scan for a table ident pattern performed, so
the fields pattern, veroffs, offs, len can be left uninitialized
- Table location is automatically detected
The table can either be located in the first or the last good blocks
of the chip (device). Set NAND_BBT_LASTBLOCK to place the bad block
table at the end of the chip (device). The bad block tables are
marked and identified by a pattern which is stored in the spare area
of the first page in the block which holds the bad block table. Store
a pointer to the pattern in the pattern field. Further the length of
the pattern has to be stored in len and the offset in the spare area
must be given in the offs member of the nand_bbt_descr structure.
For mirrored bad block tables different patterns are mandatory.
- Table creation
Set the option NAND_BBT_CREATE to enable the table creation if no
table can be found during the scan. Usually this is done only once if
a new chip is found.
- Table write support
Set the option NAND_BBT_WRITE to enable the table write support.
This allows the update of the bad block table(s) in case a block has
to be marked bad due to wear. The MTD interface function
block_markbad is calling the update function of the bad block table.
If the write support is enabled then the table is updated on FLASH.
Note: Write support should only be enabled for mirrored tables with
version control.
- Table version control
Set the option NAND_BBT_VERSION to enable the table version
control. It's highly recommended to enable this for mirrored tables
with write support. It makes sure that the risk of losing the bad
block table information is reduced to the loss of the information
about the one worn out block which should be marked bad. The version
is stored in 4 consecutive bytes in the spare area of the device. The
position of the version number is defined by the member veroffs in
the bad block table descriptor.
- Save block contents on write
In case that the block which holds the bad block table does contain
other useful information, set the option NAND_BBT_SAVECONTENT. When
the bad block table is written then the whole block is read the bad
block table is updated and the block is erased and everything is
written back. If this option is not set only the bad block table is
written and everything else in the block is ignored and erased.
- Number of reserved blocks
For automatic placement some blocks must be reserved for bad block
table storage. The number of reserved blocks is defined in the
maxblocks member of the bad block table description structure.
Reserving 4 blocks for mirrored tables should be a reasonable number.
This also limits the number of blocks which are scanned for the bad
block table ident pattern.
Spare/OOB placement와 `nand_oobinfo`
600-655NAND driver는 filesystem data의 spare area 배치를 filesystem-defined 방식 또는 automatic 방식으로 지원합니다. 기본은 chip type별 built-in automatic placement입니다.
Hardware ECC 때문에 기본 배치가 맞지 않으면 board driver가 자체 scheme을 제공할 수 있고 filesystem driver도 default 대신 자체 scheme을 줄 수 있습니다.
`nand_oobinfo`는 `useecc`, `eccbytes`, `eccpos[24]`, `oobfree[8][2]`를 가집니다.
`useecc`는 ECC와 placement를 제어합니다. `MTD_NANDECC_OFF`는 시험·진단용으로 ECC를 완전히 끄며 권장하지 않습니다. `MTD_NANDECC_PLACE`는 caller-defined, `MTD_NANDECC_AUTOPLACE`는 automatic placement입니다.
`eccbytes`는 page당 ECC byte 수, `eccpos`는 spare area의 ECC byte offset입니다. `oobfree`는 automatic placement에 쓸 `{offset, size}` area 목록이며 여러 영역을 지정하고 `{0,0}`으로 끝냅니다.
Spare area (auto)placement
--------------------------
The nand driver implements different possibilities for placement of
filesystem data in the spare area,
- Placement defined by fs driver
- Automatic placement
The default placement function is automatic placement. The nand driver
has built in default placement schemes for the various chiptypes. If due
to hardware ECC functionality the default placement does not fit then
the board driver can provide a own placement scheme.
File system drivers can provide a own placement scheme which is used
instead of the default placement scheme.
Placement schemes are defined by a nand_oobinfo structure
::
struct nand_oobinfo {
int useecc;
int eccbytes;
int eccpos[24];
int oobfree[8][2];
};
- useecc
The useecc member controls the ecc and placement function. The header
file include/mtd/mtd-abi.h contains constants to select ecc and
placement. MTD_NANDECC_OFF switches off the ecc complete. This is
not recommended and available for testing and diagnosis only.
MTD_NANDECC_PLACE selects caller defined placement,
MTD_NANDECC_AUTOPLACE selects automatic placement.
- eccbytes
The eccbytes member defines the number of ecc bytes per page.
- eccpos
The eccpos array holds the byte offsets in the spare area where the
ecc codes are placed.
- oobfree
The oobfree array defines the areas in the spare area which can be
used for automatic placement. The information is given in the format
{offset, size}. offset defines the start of the usable area, size the
length in bytes. More than one area can be defined. The list is
terminated by an {0, 0} entry.
Filesystem-defined와 automatic placement
656-689Filesystem-defined mode에서 caller는 ECC placement를 정의한 `nand_oobinfo` pointer를 제공합니다.
Write는 data buffer와 함께 `(page 수) x (spare area 크기)`의 spare buffer가 필요합니다. Read buffer는 `(page 수) x ((spare area 크기) + (page당 ECC step 수) x sizeof(int))`이며 각 tuple의 ECC check 결과를 spare data 뒤에 저장합니다.
저장 순서는 page별 spare data 다음에 ECC result 0..n이 오는 구조이며 YAFFS1이 쓰는 legacy mode입니다. Spare buffer가 NULL이면 주어진 scheme에 따른 ECC placement만 수행합니다.
Automatic mode는 built-in default로 ECC byte를 배치합니다. Filesystem data를 OOB에 저장·읽으려면 `oobfree`가 정한 page당 크기의 buffer를 제공합니다. NULL이면 default ECC placement만 수행합니다.
Caller-defined mode는 spare와 ECC result를 함께 다루고 automatic mode는 `oobfree`를 따릅니다.
Placement defined by fs driver
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The calling function provides a pointer to a nand_oobinfo structure
which defines the ecc placement. For writes the caller must provide a
spare area buffer along with the data buffer. The spare area buffer size
is (number of pages) \* (size of spare area). For reads the buffer size
is (number of pages) \* ((size of spare area) + (number of ecc steps per
page) \* sizeof (int)). The driver stores the result of the ecc check
for each tuple in the spare buffer. The storage sequence is::
<spare data page 0><ecc result 0>...<ecc result n>
...
<spare data page n><ecc result 0>...<ecc result n>
This is a legacy mode used by YAFFS1.
If the spare area buffer is NULL then only the ECC placement is done
according to the given scheme in the nand_oobinfo structure.
Automatic placement
~~~~~~~~~~~~~~~~~~~
Automatic placement uses the built in defaults to place the ecc bytes in
the spare area. If filesystem data have to be stored / read into the
spare area then the calling function must provide a buffer. The buffer
size per page is determined by the oobfree array in the nand_oobinfo
structure.
If the spare area buffer is NULL then only the ECC placement is done
according to the default builtin scheme.
256-byte page OOB 기본 배치
690-711256-byte page의 8-byte spare area에서 offset `0x00..0x02`는 ECC byte 0..2입니다.
`0x03`, `0x04`, `0x06`, `0x07`은 Autoplace 0..3입니다. `0x05`는 첫 page의 bad-block marker이며 bit 하나라도 0이면 bad block입니다. 나머지 page에서는 reserved입니다.
Spare area autoplacement default schemes
----------------------------------------
256 byte pagesize
~~~~~~~~~~~~~~~~~
======== ================== ===================================================
Offset Content Comment
======== ================== ===================================================
0x00 ECC byte 0 Error correction code byte 0
0x01 ECC byte 1 Error correction code byte 1
0x02 ECC byte 2 Error correction code byte 2
0x03 Autoplace 0
0x04 Autoplace 1
0x05 Bad block marker If any bit in this byte is zero, then this
block is bad. This applies only to the first
page in a block. In the remaining pages this
byte is reserved
0x06 Autoplace 2
0x07 Autoplace 3
======== ================== ===================================================
512-byte page OOB 기본 배치
712-738512-byte page는 두 256-byte data half에 각각 ECC 3 byte를 둡니다. `0x00..0x02`는 lower half ECC byte 0..2입니다.
Upper half ECC는 `0x03`에 byte 3, `0x06..0x07`에 byte 4..5를 둡니다. `0x04`는 reserved, `0x05`는 첫 page bad-block marker입니다.
`0x08..0x0f`는 Autoplace 0..7입니다.
512 byte pagesize
~~~~~~~~~~~~~~~~~
============= ================== ==============================================
Offset Content Comment
============= ================== ==============================================
0x00 ECC byte 0 Error correction code byte 0 of the lower
256 Byte data in this page
0x01 ECC byte 1 Error correction code byte 1 of the lower
256 Bytes of data in this page
0x02 ECC byte 2 Error correction code byte 2 of the lower
256 Bytes of data in this page
0x03 ECC byte 3 Error correction code byte 0 of the upper
256 Bytes of data in this page
0x04 reserved reserved
0x05 Bad block marker If any bit in this byte is zero, then this
block is bad. This applies only to the first
page in a block. In the remaining pages this
byte is reserved
0x06 ECC byte 4 Error correction code byte 1 of the upper
256 Bytes of data in this page
0x07 ECC byte 5 Error correction code byte 2 of the upper
256 Bytes of data in this page
0x08 - 0x0F Autoplace 0 - 7
============= ================== ==============================================
2048-byte page OOB 기본 배치
739-8002048-byte page의 `0x00`은 첫 page bad-block marker이고 `0x01`은 reserved입니다. `0x02..0x27`은 Autoplace 0..37입니다.
Page는 여덟 개 256-byte chunk로 나뉘며 각 chunk마다 ECC 3 byte를 사용합니다. `0x28..0x3f`에 ECC byte 0..23을 연속 배치합니다.
즉 `0x28..0x2a`는 첫 chunk, `0x2b..0x2d`는 둘째, 이후 같은 순서로 진행해 `0x3d..0x3f`가 여덟째 chunk의 ECC입니다.
2048 byte pagesize
~~~~~~~~~~~~~~~~~~
=========== ================== ================================================
Offset Content Comment
=========== ================== ================================================
0x00 Bad block marker If any bit in this byte is zero, then this block
is bad. This applies only to the first page in a
block. In the remaining pages this byte is
reserved
0x01 Reserved Reserved
0x02-0x27 Autoplace 0 - 37
0x28 ECC byte 0 Error correction code byte 0 of the first
256 Byte data in this page
0x29 ECC byte 1 Error correction code byte 1 of the first
256 Bytes of data in this page
0x2A ECC byte 2 Error correction code byte 2 of the first
256 Bytes data in this page
0x2B ECC byte 3 Error correction code byte 0 of the second
256 Bytes of data in this page
0x2C ECC byte 4 Error correction code byte 1 of the second
256 Bytes of data in this page
0x2D ECC byte 5 Error correction code byte 2 of the second
256 Bytes of data in this page
0x2E ECC byte 6 Error correction code byte 0 of the third
256 Bytes of data in this page
0x2F ECC byte 7 Error correction code byte 1 of the third
256 Bytes of data in this page
0x30 ECC byte 8 Error correction code byte 2 of the third
256 Bytes of data in this page
0x31 ECC byte 9 Error correction code byte 0 of the fourth
256 Bytes of data in this page
0x32 ECC byte 10 Error correction code byte 1 of the fourth
256 Bytes of data in this page
0x33 ECC byte 11 Error correction code byte 2 of the fourth
256 Bytes of data in this page
0x34 ECC byte 12 Error correction code byte 0 of the fifth
256 Bytes of data in this page
0x35 ECC byte 13 Error correction code byte 1 of the fifth
256 Bytes of data in this page
0x36 ECC byte 14 Error correction code byte 2 of the fifth
256 Bytes of data in this page
0x37 ECC byte 15 Error correction code byte 0 of the sixth
256 Bytes of data in this page
0x38 ECC byte 16 Error correction code byte 1 of the sixth
256 Bytes of data in this page
0x39 ECC byte 17 Error correction code byte 2 of the sixth
256 Bytes of data in this page
0x3A ECC byte 18 Error correction code byte 0 of the seventh
256 Bytes of data in this page
0x3B ECC byte 19 Error correction code byte 1 of the seventh
256 Bytes of data in this page
0x3C ECC byte 20 Error correction code byte 2 of the seventh
256 Bytes of data in this page
0x3D ECC byte 21 Error correction code byte 0 of the eighth
256 Bytes of data in this page
0x3E ECC byte 22 Error correction code byte 1 of the eighth
256 Bytes of data in this page
0x3F ECC byte 23 Error correction code byte 2 of the eighth
256 Bytes of data in this page
=========== ================== ================================================
NAND-aware filesystem과 도구
801-835NAND driver는 MTD interface를 통해 filesystem에 필요한 function을 제공합니다. Filesystem은 NAND의 제약을 이해해야 합니다.
NAND page는 erase 전 연속 write 횟수가 manufacturer specification에 따라 1~3회로 제한되며 spare area에도 비슷한 제약이 있습니다.
따라서 NAND-aware filesystem은 page-size chunk로 쓰거나 작은 write를 page 크기까지 모으는 write buffer를 사용해야 합니다. 사용 가능한 filesystem은 JFFS2와 YAFFS입니다. Spare area data는 앞서 설명한 placement 기능으로 제어합니다.
MTD project는 partition erase/format용 `flasherase`, `flasheraseall`, filesystem image write용 `nandwrite`, NAND partition dump용 `nanddump`를 제공합니다. NAND 제약을 이해하는 이 도구를 사용해야 합니다.
Filesystem support
==================
The NAND driver provides all necessary functions for a filesystem via
the MTD interface.
Filesystems must be aware of the NAND peculiarities and restrictions.
One major restrictions of NAND Flash is, that you cannot write as often
as you want to a page. The consecutive writes to a page, before erasing
it again, are restricted to 1-3 writes, depending on the manufacturers
specifications. This applies similar to the spare area.
Therefore NAND aware filesystems must either write in page size chunks
or hold a writebuffer to collect smaller writes until they sum up to
pagesize. Available NAND aware filesystems: JFFS2, YAFFS.
The spare area usage to store filesystem data is controlled by the spare
area placement functionality which is described in one of the earlier
chapters.
Tools
=====
The MTD project provides a couple of helpful tools to handle NAND Flash.
- flasherase, flasheraseall: Erase and format FLASH partitions
- nandwrite: write filesystem images to NAND FLASH
- nanddump: dump the contents of a NAND FLASH partitions
These tools are aware of the NAND restrictions. Please use those tools
instead of complaining about errors which are caused by non NAND aware
access methods.
Chip ID와 runtime option constant
836-878Driver developer가 사용할 constant는 `rawnand.h`에 정의되며 OR해 chip 기능을 기술합니다.
`NAND_BUSWIDTH_16`은 16-bit bus, `NAND_NO_PADDING`은 padding 없는 partial program, `NAND_CACHEPRG`는 cache program, `NAND_COPYBACK`은 copy-back 기능입니다.
`NAND_IS_AND`는 4 bank와 특수 page/block mapping을 가진 AND chip, `NAND_4PAGE_ARRAY`는 추가 ready/busy wait 없이 읽을 수 있는 4-page array입니다.
Runtime option `NAND_HWECC_SYNDROME`은 read 시 ECC value 대신 syndrome을 주는 hardware generator를 표시합니다. ECC byte가 data 바로 뒤에 있어야 하며 DOC와 AG-AND Renesas Reed-Solomon generator에 적용됩니다.
Constants
=========
This chapter describes the constants which might be relevant for a
driver developer.
Chip option constants
---------------------
Constants for chip id table
~~~~~~~~~~~~~~~~~~~~~~~~~~~
These constants are defined in rawnand.h. They are OR-ed together to
describe the chip functionality::
/* Buswitdh is 16 bit */
#define NAND_BUSWIDTH_16 0x00000002
/* Device supports partial programming without padding */
#define NAND_NO_PADDING 0x00000004
/* Chip has cache program function */
#define NAND_CACHEPRG 0x00000008
/* Chip has copy back function */
#define NAND_COPYBACK 0x00000010
/* AND Chip which has 4 banks and a confusing page / block
* assignment. See Renesas datasheet for further information */
#define NAND_IS_AND 0x00000020
/* Chip has a array of 4 pages which can be read without
* additional ready /busy waits */
#define NAND_4PAGE_ARRAY 0x00000040
Constants for runtime options
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
These constants are defined in rawnand.h. They are OR-ed together to
describe the functionality::
/* The hw ecc generator provides a syndrome instead a ecc value on read
* This can only work if we have the ecc bytes directly behind the
* data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
#define NAND_HWECC_SYNDROME 0x00020000
ECC selection constant
879-897ECC algorithm은 constant로 선택합니다. `NAND_ECC_NONE`은 ECC를 끄며 권장하지 않습니다.
`NAND_ECC_SOFT`는 256-byte data당 3-byte software ECC입니다. Hardware variant는 256/512-byte step과 3/6/8-byte ECC 조합을 제공합니다.
ECC selection constants
-----------------------
Use these constants to select the ECC algorithm::
/* No ECC. Usage is not recommended ! */
#define NAND_ECC_NONE 0
/* Software ECC 3 byte ECC per 256 Byte data */
#define NAND_ECC_SOFT 1
/* Hardware ECC 3 byte ECC per 256 Byte data */
#define NAND_ECC_HW3_256 2
/* Hardware ECC 3 byte ECC per 512 Byte data */
#define NAND_ECC_HW3_512 3
/* Hardware ECC 6 byte ECC per 512 Byte data */
#define NAND_ECC_HW6_512 4
/* Hardware ECC 8 byte ECC per 512 Byte data */
#define NAND_ECC_HW8_512 6
Hardware control constant
898-921Board-specific hardware control callback은 요청된 signal operation을 constant로 받습니다.
`NAND_CTL_SETNCE/CLRNCE`는 nCE를 low/high로 만들어 chip을 select/deselect합니다. `SETCLE/CLRCLE`는 command latch, `SETALE/CLRALE`는 address latch를 high/low로 전환합니다.
`SETWP/CLRWP`는 WP high/low를 의미하지만 사용되지 않습니다.
Hardware control related constants
----------------------------------
These constants describe the requested hardware access function when the
boardspecific hardware control function is called::
/* Select the chip by setting nCE to low */
#define NAND_CTL_SETNCE 1
/* Deselect the chip by setting nCE to high */
#define NAND_CTL_CLRNCE 2
/* Select the command latch by setting CLE to high */
#define NAND_CTL_SETCLE 3
/* Deselect the command latch by setting CLE to low */
#define NAND_CTL_CLRCLE 4
/* Select the address latch by setting ALE to high */
#define NAND_CTL_SETALE 5
/* Deselect the address latch by setting ALE to low */
#define NAND_CTL_CLRALE 6
/* Set write protection by setting WP to high. Not used! */
#define NAND_CTL_SETWP 7
/* Clear write protection by setting WP to low. Not used! */
#define NAND_CTL_CLRWP 8
Bad block table constant
922-951BBT descriptor option은 block당 bit 수, 위치, scope, version, 생성·write·content 보존을 정의합니다.
`NAND_BBT_1BIT/2BIT/4BIT/8BIT`와 `NAND_BBT_NRBITS_MSK`가 block representation을 정합니다.
`NAND_BBT_LASTBLOCK`은 마지막 good block, `NAND_BBT_ABSPAGE`는 지정 page, `NAND_BBT_PERCHIP`은 chip별 table입니다.
`NAND_BBT_VERSION`은 version counter, `NAND_BBT_CREATE`는 없을 때 생성, `NAND_BBT_WRITE`는 필요 시 기록, `NAND_BBT_SAVECONTENT`는 write 때 block 내용을 read-back해 보존합니다.
Bad block table related constants
---------------------------------
These constants describe the options used for bad block table
descriptors::
/* Options for the bad block table descriptors */
/* The number of bits used per block in the bbt on the device */
#define NAND_BBT_NRBITS_MSK 0x0000000F
#define NAND_BBT_1BIT 0x00000001
#define NAND_BBT_2BIT 0x00000002
#define NAND_BBT_4BIT 0x00000004
#define NAND_BBT_8BIT 0x00000008
/* The bad block table is in the last good block of the device */
#define NAND_BBT_LASTBLOCK 0x00000010
/* The bbt is at the given page, else we must scan for the bbt */
#define NAND_BBT_ABSPAGE 0x00000020
/* bbt is stored per chip on multichip devices */
#define NAND_BBT_PERCHIP 0x00000080
/* bbt has a version counter at offset veroffs */
#define NAND_BBT_VERSION 0x00000100
/* Create a bbt if none axists */
#define NAND_BBT_CREATE 0x00000200
/* Write bbt if necessary */
#define NAND_BBT_WRITE 0x00001000
/* Read and write back block contents when writing bbt */
#define NAND_BBT_SAVECONTENT 0x00002000
NAND structure kernel-doc
952-963이 절은 driver developer에게 관련될 수 있는 NAND structure의 자동 생성 문서를 포함합니다.
각 member의 `[XXX]` identifier는 앞의 Documentation hints 절에 정의된 scope와 ownership을 나타냅니다.
Source는 `include/linux/mtd/rawnand.h`이며 internal member까지 포함합니다.
Structures
==========
This chapter contains the autogenerated documentation of the structures
which are used in the NAND driver and might be relevant for a driver
developer. Each struct member has a short description which is marked
with an [XXX] identifier. See the chapter "Documentation hints" for an
explanation.
.. kernel-doc:: include/linux/mtd/rawnand.h
:internal:
Exported·internal NAND function
964-989Public 절은 `drivers/mtd/nand/raw/nand_base.c`에서 export된 NAND kernel API function의 자동 생성 문서를 제공합니다.
Internal 절은 `nand_base.c`와 `nand_bbt.c`의 내부 function을 포함합니다. `[DEFAULT]`로 표시된 function은 board driver 개발자에게 관련될 수 있습니다.
Public Functions Provided
=========================
This chapter contains the autogenerated documentation of the NAND kernel
API functions which are exported. Each function has a short description
which is marked with an [XXX] identifier. See the chapter "Documentation
hints" for an explanation.
.. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
:export:
Internal Functions Provided
===========================
This chapter contains the autogenerated documentation of the NAND driver
internal functions. Each function has a short description which is
marked with an [XXX] identifier. See the chapter "Documentation hints"
for an explanation. The functions marked with [DEFAULT] might be
relevant for a board driver developer.
.. kernel-doc:: drivers/mtd/nand/raw/nand_base.c
:internal:
.. kernel-doc:: drivers/mtd/nand/raw/nand_bbt.c
:internal:
기여자
990-1006NAND driver에는 Steven J. Hill, David Woodhouse, Thomas Gleixner가 기여했습니다.
많은 사용자가 bugfix, improvement, test 지원을 제공했습니다.
이 문서에는 Thomas Gleixner가 기여했습니다.
Credits
=======
The following people have contributed to the NAND driver:
1. Steven J. Hill\ [email protected]
2. David Woodhouse\ [email protected]
3. Thomas Gleixner\ [email protected]
A lot of users have provided bugfixes, improvements and helping hands
for testing. Thanks a lot.
The following people have contributed to this document:
1. Thomas Gleixner\ [email protected]
요약과 해설
mtdnand.rst:1-1006Board-specific signal과 resource를 generic NAND core에 연결하고 ECC·BBT·OOB 정책을 설정해 MTD와 NAND-aware filesystem에 노출하는 전체 programming interface입니다.