요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra210 xHCI controller
maintainers:
- Thierry Reding <[email protected]>
- Jon Hunter <[email protected]>
description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
exposed by the Tegra XUSB pad controller.
properties:
compatible:
const: nvidia,tegra210-xusb
reg:
items:
- description: base and length of the xHCI host registers
- description: base and length of the XUSB FPCI registers
- description: base and length of the XUSB IPFS registers
reg-names:
items:
- const: hcd
- const: fpci
- const: ipfs
interrupts:
items:
- description: xHCI host interrupt
- description: mailbox interrupt
clocks:
items:
- description: XUSB host clock
- description: XUSB host source clock
- description: XUSB Falcon source clock
- description: XUSB SuperSpeed clock
- description: XUSB SuperSpeed clock divider
- description: XUSB SuperSpeed source clock
- description: XUSB HighSpeed clock source
- description: XUSB FullSpeed clock source
- description: USB PLL
- description: reference clock
- description: I/O PLL
clock-names:
items:
- const: xusb_host
- const: xusb_host_src
- const: xusb_falcon_src
- const: xusb_ss
- const: xusb_ss_div2
- const: xusb_ss_src
- const: xusb_hs_src
- const: xusb_fs_src
- const: pll_u_480m
- const: clk_m
- const: pll_e
resets:
items:
- description: reset for the XUSB host controller
- description: reset for the SuperSpeed logic
- description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.
reset-names:
items:
- const: xusb_host
- const: xusb_ss
- const: xusb_src
nvidia,xusb-padctl:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle to the XUSB pad controller that is used to configure
the USB pads used by the XHCI controller
phys:
minItems: 1
maxItems: 9
phy-names:
minItems: 1
maxItems: 9
items:
enum:
- usb2-0
- usb2-1
- usb2-2
- usb2-3
- hsic-0
- usb3-0
- usb3-1
- usb3-2
- usb3-3
power-domains:
items:
- description: XUSBC power domain (for Host and USB 2.0)
- description: XUSBA power domain (for SuperSpeed)
power-domain-names:
items:
- const: xusb_host
- const: xusb_ss
dvddio-pex-supply:
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
hvddio-pex-supply:
description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
avdd-usb-supply:
description: USB controller power supply. Must supply 3.3 V.
avdd-pll-utmip-supply:
description: UTMI PLL power supply. Must supply 1.8 V.
avdd-pll-uerefe-supply:
description: PLLE reference PLL power supply. Must supply 1.05 V.
dvdd-usb-ss-pll-supply:
description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
hvdd-usb-ss-pll-e-supply:
description: High-voltage PLLE power supply. Must supply 1.8 V.
allOf:
- $ref: usb-xhci.yaml
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
usb@70090000 {
compatible = "nvidia,tegra210-xusb";
reg = <0x70090000 0x8000>,
<0x70098000 0x1000>,
<0x70099000 0x1000>;
reg-names = "hcd", "fpci", "ipfs";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>,
<&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_PLL_U_480M>,
<&tegra_car TEGRA210_CLK_CLK_M>,
<&tegra_car TEGRA210_CLK_PLL_E>;
clock-names = "xusb_host", "xusb_host_src",
"xusb_falcon_src", "xusb_ss",
"xusb_ss_div2", "xusb_ss_src",
"xusb_hs_src", "xusb_fs_src",
"pll_u_480m", "clk_m", "pll_e";
resets = <&tegra_car 89>, <&tegra_car 156>,
<&tegra_car 143>;
reset-names = "xusb_host", "xusb_ss", "xusb_src";
power-domains = <&pd_xusbhost>, <&pd_xusbss>;
power-domain-names = "xusb_host", "xusb_ss";
nvidia,xusb-padctl = <&padctl>;
phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_2>, <&phy_usb2_3>,
<&phy_pcie_6>, <&phy_pcie_5>;
phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
"usb3-1";
dvddio-pex-supply = <&vdd_pex_1v05>;
hvddio-pex-supply = <&vdd_1v8>;
avdd-usb-supply = <&vdd_3v3_sys>;
avdd-pll-utmip-supply = <&vdd_1v8>;
avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
#address-cells = <1>;
#size-cells = <0>;
ethernet@1 {
compatible = "usb955,9ff";
reg = <1>;
};
};
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
NVIDIA Tegra210 xHCI
1-15GPL-2.0-only 또는 BSD-2-Clause로 배포되는 이 schema는 NVIDIA Tegra210 xHCI controller를 정의합니다. Tegra XUSB pad controller가 제공하는 USB2와 USB3 interface를 모두 지원하며 관리자는 Thierry Reding과 Jon Hunter입니다.
세 register와 두 interrupt
16-36`compatible`은 `nvidia,tegra210-xusb`입니다. register는 xHCI host용 `hcd`, XUSB FPCI용 `fpci`, XUSB IPFS용 `ipfs` 순서의 세 개입니다. interrupt는 xHCI host와 mailbox 순서의 두 개입니다.
properties:
compatible:
const: nvidia,tegra210-xusb
reg:
items:
- description: base and length of the xHCI host registers
- description: base and length of the XUSB FPCI registers
- description: base and length of the XUSB IPFS registers
reg-names:
items:
- const: hcd
- const: fpci
- const: ipfs
interrupts:
items:
- description: xHCI host interrupt
- description: mailbox interrupt
11개 clock, reset과 pad controller
37-80clock은 XUSB host, host source, Falcon source, SuperSpeed, SuperSpeed divider, SuperSpeed source, High-Speed source, Full-Speed source, USB PLL, reference, I/O PLL 순서입니다.
이름은 `xusb_host`, `xusb_host_src`, `xusb_falcon_src`, `xusb_ss`, `xusb_ss_div2`, `xusb_ss_src`, `xusb_hs_src`, `xusb_fs_src`, `pll_u_480m`, `clk_m`, `pll_e`입니다.
reset은 host controller용 `xusb_host`, SuperSpeed logic용 `xusb_ss`, source clock 공유 reset `xusb_src`입니다. `nvidia,xusb-padctl`은 USB pad를 구성하는 XUSB pad controller phandle입니다.
clocks:
items:
- description: XUSB host clock
- description: XUSB host source clock
- description: XUSB Falcon source clock
- description: XUSB SuperSpeed clock
- description: XUSB SuperSpeed clock divider
- description: XUSB SuperSpeed source clock
- description: XUSB HighSpeed clock source
- description: XUSB FullSpeed clock source
- description: USB PLL
- description: reference clock
- description: I/O PLL
clock-names:
items:
- const: xusb_host
- const: xusb_host_src
- const: xusb_falcon_src
- const: xusb_ss
- const: xusb_ss_div2
- const: xusb_ss_src
- const: xusb_hs_src
- const: xusb_fs_src
- const: pll_u_480m
- const: clk_m
- const: pll_e
resets:
items:
- description: reset for the XUSB host controller
- description: reset for the SuperSpeed logic
- description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.
reset-names:
items:
- const: xusb_host
- const: xusb_ss
- const: xusb_src
nvidia,xusb-padctl:
$ref: /schemas/types.yaml#/definitions/phandle
description: phandle to the XUSB pad controller that is used to configure
the USB pads used by the XHCI controller
아홉 PHY와 두 power domain
81-110PHY와 이름은 1~9개이며 USB2 port 0~3, HSIC 0, USB3 port 0~3을 허용합니다.
power domain은 Host·USB2용 XUSBC `xusb_host`와 SuperSpeed용 XUSBA `xusb_ss` 순서입니다.
phys:
minItems: 1
maxItems: 9
phy-names:
minItems: 1
maxItems: 9
items:
enum:
- usb2-0
- usb2-1
- usb2-2
- usb2-3
- hsic-0
- usb3-0
- usb3-1
- usb3-2
- usb3-3
power-domains:
items:
- description: XUSBC power domain (for Host and USB 2.0)
- description: XUSBA power domain (for SuperSpeed)
power-domain-names:
items:
- const: xusb_host
- const: xusb_ss
Tegra210 supply와 공통 schema
111-136PCIe/USB3 analog logic과 PLL, USB controller, UTMI PLL, PLLE reference에 1.05 V, 1.8 V, 3.3 V supply를 정의합니다.
공통 `usb-xhci.yaml`을 상속하고 평가되지 않은 추가 속성을 허용하지 않습니다. 이 파일에는 별도의 `required` 목록이 없습니다.
dvddio-pex-supply:
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
hvddio-pex-supply:
description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
avdd-usb-supply:
description: USB controller power supply. Must supply 3.3 V.
avdd-pll-utmip-supply:
description: UTMI PLL power supply. Must supply 1.8 V.
avdd-pll-uerefe-supply:
description: PLLE reference PLL power supply. Must supply 1.05 V.
dvdd-usb-ss-pll-supply:
description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
hvdd-usb-ss-pll-e-supply:
description: High-voltage PLLE power supply. Must supply 1.8 V.
allOf:
- $ref: usb-xhci.yaml
unevaluatedProperties: false
Tegra210 XUSB와 hard-wired Ethernet
137-195예제 `usb@70090000`은 `hcd`, `fpci`, `ipfs` register, level-high GIC SPI 39·40, 11개 clock과 세 reset을 사용합니다.
XUSBC·XUSBA power domain, pad controller, USB2 port 0~3과 USB3 port 0~1 PHY를 연결하고 각 supply를 지정합니다.
controller 아래 `ethernet@1`은 product `usb955,9ff`인 hard-wired USB Ethernet device를 port 1에 둡니다.
examples:
- |
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
usb@70090000 {
compatible = "nvidia,tegra210-xusb";
reg = <0x70090000 0x8000>,
<0x70098000 0x1000>,
<0x70099000 0x1000>;
reg-names = "hcd", "fpci", "ipfs";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>,
<&tegra_car TEGRA210_CLK_XUSB_HOST_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FALCON_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SS_DIV2>,
<&tegra_car TEGRA210_CLK_XUSB_SS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_PLL_U_480M>,
<&tegra_car TEGRA210_CLK_CLK_M>,
<&tegra_car TEGRA210_CLK_PLL_E>;
clock-names = "xusb_host", "xusb_host_src",
"xusb_falcon_src", "xusb_ss",
"xusb_ss_div2", "xusb_ss_src",
"xusb_hs_src", "xusb_fs_src",
"pll_u_480m", "clk_m", "pll_e";
resets = <&tegra_car 89>, <&tegra_car 156>,
<&tegra_car 143>;
reset-names = "xusb_host", "xusb_ss", "xusb_src";
power-domains = <&pd_xusbhost>, <&pd_xusbss>;
power-domain-names = "xusb_host", "xusb_ss";
nvidia,xusb-padctl = <&padctl>;
phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb2_2>, <&phy_usb2_3>,
<&phy_pcie_6>, <&phy_pcie_5>;
phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",
"usb3-1";
dvddio-pex-supply = <&vdd_pex_1v05>;
hvddio-pex-supply = <&vdd_1v8>;
avdd-usb-supply = <&vdd_3v3_sys>;
avdd-pll-utmip-supply = <&vdd_1v8>;
avdd-pll-uerefe-supply = <&vdd_pex_1v05>;
dvdd-usb-ss-pll-supply = <&vdd_pex_1v05>;
hvdd-usb-ss-pll-e-supply = <&vdd_1v8>;
#address-cells = <1>;
#size-cells = <0>;
ethernet@1 {
compatible = "usb955,9ff";
reg = <1>;
};
};
요약과 해설
nvidia,tegra210-xusb.yaml:1-195Tegra210 XUSB의 세 register, 11개 clock, PHY·power와 hard-wired Ethernet을 설명합니다. 접을 수 있는 영어 원문 전체와 한국어 전문 번역을 함께 제공하며, compatible, register, interrupt, clock, PHY, power, source path와 원문 줄 좌표를 원형대로 보존합니다.