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Linux 6.18.37 · Devicetree Bindings / USB

NVIDIA Tegra186 xHCI Controller

Tegra186 XUSB의 BPMP clock, interconnect, IOMMU, power-domain과 PHY 구성을 설명합니다.

Source pathDocumentation/devicetree/bindings/usb/nvidia,tegra186-xusb.yaml
Source versionLinux v6.18.37
TranslationDUJINLABS 전문 번역 + 해설

요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.

1. 요약·해설

원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.

요약과 해설

nvidia,tegra186-xusb.yaml:1-171

Tegra186 XUSB의 BPMP clock, interconnect, IOMMU, power-domain과 PHY 구성을 설명합니다. 접을 수 있는 영어 원문 전체와 한국어 전문 번역을 함께 제공하며, compatible, register, interrupt, clock, PHY, power, supply, source path와 원문 줄 좌표를 원형대로 보존합니다.

2. 영어 원문 전체

번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.

원문 전체 펼치기
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: NVIDIA Tegra186 xHCI controller
8
9 maintainers:
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
12
13 description: The Tegra xHCI controller supports both USB2 and USB3 interfaces
14 exposed by the Tegra XUSB pad controller.
15
16 properties:
17 compatible:
18 const: nvidia,tegra186-xusb
19
20 reg:
21 items:
22 - description: base and length of the xHCI host registers
23 - description: base and length of the XUSB FPCI registers
24
25 reg-names:
26 items:
27 - const: hcd
28 - const: fpci
29
30 interrupts:
31 items:
32 - description: xHCI host interrupt
33 - description: mailbox interrupt
34
35 clocks:
36 items:
37 - description: XUSB host clock
38 - description: XUSB Falcon source clock
39 - description: XUSB SuperSpeed clock
40 - description: XUSB SuperSpeed source clock
41 - description: XUSB HighSpeed clock source
42 - description: XUSB FullSpeed clock source
43 - description: USB PLL
44 - description: reference clock
45 - description: I/O PLL
46
47 clock-names:
48 items:
49 - const: xusb_host
50 - const: xusb_falcon_src
51 - const: xusb_ss
52 - const: xusb_ss_src
53 - const: xusb_hs_src
54 - const: xusb_fs_src
55 - const: pll_u_480m
56 - const: clk_m
57 - const: pll_e
58
59 interconnects:
60 items:
61 - description: read client
62 - description: write client
63
64 interconnect-names:
65 items:
66 - const: dma-mem # read
67 - const: write
68
69 iommus:
70 maxItems: 1
71
72 nvidia,xusb-padctl:
73 $ref: /schemas/types.yaml#/definitions/phandle
74 description: phandle to the XUSB pad controller that is used to configure
75 the USB pads used by the XHCI controller
76
77 phys:
78 minItems: 1
79 maxItems: 7
80
81 phy-names:
82 minItems: 1
83 maxItems: 7
84 items:
85 enum:
86 - usb2-0
87 - usb2-1
88 - usb2-2
89 - hsic-0
90 - usb3-0
91 - usb3-1
92 - usb3-2
93
94 power-domains:
95 items:
96 - description: XUSBC power domain (for Host and USB 2.0)
97 - description: XUSBA power domain (for SuperSpeed)
98
99 power-domain-names:
100 items:
101 - const: xusb_host
102 - const: xusb_ss
103
104 dvddio-pex-supply:
105 description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
106
107 hvddio-pex-supply:
108 description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.
109
110 avdd-usb-supply:
111 description: USB controller power supply. Must supply 3.3 V.
112
113 avdd-pll-utmip-supply:
114 description: UTMI PLL power supply. Must supply 1.8 V.
115
116 avdd-pll-uerefe-supply:
117 description: PLLE reference PLL power supply. Must supply 1.05 V.
118
119 dvdd-usb-ss-pll-supply:
120 description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
121
122 hvdd-usb-ss-pll-e-supply:
123 description: High-voltage PLLE power supply. Must supply 1.8 V.
124
125 allOf:
126 - $ref: usb-xhci.yaml
127
128 unevaluatedProperties: false
129
130 examples:
131 - |
132 #include <dt-bindings/clock/tegra186-clock.h>
133 #include <dt-bindings/interrupt-controller/arm-gic.h>
134 #include <dt-bindings/memory/tegra186-mc.h>
135 #include <dt-bindings/power/tegra186-powergate.h>
136 #include <dt-bindings/reset/tegra186-reset.h>
137
138 usb@3530000 {
139 compatible = "nvidia,tegra186-xusb";
140 reg = <0x03530000 0x8000>,
141 <0x03538000 0x1000>;
142 reg-names = "hcd", "fpci";
143 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
144 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
145 clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>,
146 <&bpmp TEGRA186_CLK_XUSB_FALCON>,
147 <&bpmp TEGRA186_CLK_XUSB_SS>,
148 <&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
149 <&bpmp TEGRA186_CLK_CLK_M>,
150 <&bpmp TEGRA186_CLK_XUSB_FS>,
151 <&bpmp TEGRA186_CLK_PLLU>,
152 <&bpmp TEGRA186_CLK_CLK_M>,
153 <&bpmp TEGRA186_CLK_PLLE>;
154 clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss",
155 "xusb_ss_src", "xusb_hs_src", "xusb_fs_src",
156 "pll_u_480m", "clk_m", "pll_e";
157 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
158 <&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
159 power-domain-names = "xusb_host", "xusb_ss";
160 interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &emc>,
161 <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTW &emc>;
162 interconnect-names = "dma-mem", "write";
163 iommus = <&smmu TEGRA186_SID_XUSB_HOST>;
164 nvidia,xusb-padctl = <&padctl>;
165
166 #address-cells = <1>;
167 #size-cells = <0>;
168
169 phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb3_0>;
170 phy-names = "usb2-0", "usb2-1", "usb3-0";
171 };
172

3. 한국어 전문 번역

영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.

NVIDIA Tegra186 xHCI

1-15

GPL-2.0-only 또는 BSD-2-Clause로 배포되는 이 schema는 NVIDIA Tegra186 xHCI controller를 정의합니다. Tegra XUSB pad controller가 제공하는 USB2와 USB3 interface를 모두 지원하며 관리자는 Thierry Reding과 Jon Hunter입니다.

Register와 두 interrupt

16-34

`compatible`은 `nvidia,tegra186-xusb`입니다. register는 xHCI host용 `hcd`와 XUSB FPCI용 `fpci` 두 개입니다. interrupt는 xHCI host와 mailbox 순서의 두 개입니다.

properties:
  compatible:
    const: nvidia,tegra186-xusb

  reg:
    items:
      - description: base and length of the xHCI host registers
      - description: base and length of the XUSB FPCI registers

  reg-names:
    items:
      - const: hcd
      - const: fpci

  interrupts:
    items:
      - description: xHCI host interrupt
      - description: mailbox interrupt

아홉 clock, interconnect와 IOMMU

35-70

clock은 XUSB host, Falcon source, SuperSpeed, SuperSpeed source, High-Speed source, Full-Speed source, USB PLL, reference, I/O PLL 순서이며 이름은 `xusb_host`, `xusb_falcon_src`, `xusb_ss`, `xusb_ss_src`, `xusb_hs_src`, `xusb_fs_src`, `pll_u_480m`, `clk_m`, `pll_e`입니다.

interconnect는 read·write client 순서이며 이름은 `dma-mem`, `write`입니다. IOMMU는 하나만 허용합니다.

clocks:
  items:
    - description: XUSB host clock
    - description: XUSB Falcon source clock
    - description: XUSB SuperSpeed clock
    - description: XUSB SuperSpeed source clock
    - description: XUSB HighSpeed clock source
    - description: XUSB FullSpeed clock source
    - description: USB PLL
    - description: reference clock
    - description: I/O PLL

clock-names:
  items:
    - const: xusb_host
    - const: xusb_falcon_src
    - const: xusb_ss
    - const: xusb_ss_src
    - const: xusb_hs_src
    - const: xusb_fs_src
    - const: pll_u_480m
    - const: clk_m
    - const: pll_e

interconnects:
  items:
    - description: read client
    - description: write client

interconnect-names:
  items:
    - const: dma-mem # read
    - const: write

iommus:
  maxItems: 1

Pad controller, PHY와 power domain

71-103

`nvidia,xusb-padctl`은 USB pad를 구성하는 XUSB pad controller phandle입니다. PHY와 이름은 1~7개이며 USB2 port 0~2, HSIC 0, USB3 port 0~2를 허용합니다.

power domain은 Host·USB2용 XUSBC `xusb_host`와 SuperSpeed용 XUSBA `xusb_ss` 순서입니다.


nvidia,xusb-padctl:
  $ref: /schemas/types.yaml#/definitions/phandle
  description: phandle to the XUSB pad controller that is used to configure
    the USB pads used by the XHCI controller

phys:
  minItems: 1
  maxItems: 7

phy-names:
  minItems: 1
  maxItems: 7
  items:
    enum:
      - usb2-0
      - usb2-1
      - usb2-2
      - hsic-0
      - usb3-0
      - usb3-1
      - usb3-2

power-domains:
  items:
    - description: XUSBC power domain (for Host and USB 2.0)
    - description: XUSBA power domain (for SuperSpeed)

power-domain-names:
  items:
    - const: xusb_host
    - const: xusb_ss

Tegra186 전원과 공통 schema

104-129

PCIe/USB3 logic·PLL, USB controller, UTMI PLL과 PLLE reference에 1.05 V, 1.8 V, 3.3 V supply를 정의합니다. `hvddio-pex`와 high-voltage PLLE supply는 1.8 V입니다.

공통 `usb-xhci.yaml`을 상속하며 평가되지 않은 추가 속성은 허용하지 않습니다. 이 파일에는 별도의 `required` 목록이 없으므로 공통 schema와 상위 DTS 검증 조건을 함께 적용합니다.

  dvddio-pex-supply:
    description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.

  hvddio-pex-supply:
    description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.

  avdd-usb-supply:
    description: USB controller power supply. Must supply 3.3 V.

  avdd-pll-utmip-supply:
    description: UTMI PLL power supply. Must supply 1.8 V.

  avdd-pll-uerefe-supply:
    description: PLLE reference PLL power supply. Must supply 1.05 V.

  dvdd-usb-ss-pll-supply:
    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.

  hvdd-usb-ss-pll-e-supply:
    description: High-voltage PLLE power supply. Must supply 1.8 V.

allOf:
  - $ref: usb-xhci.yaml

unevaluatedProperties: false

Tegra186 BPMP XUSB 예제

130-171

예제 `usb@3530000`은 `hcd`, `fpci` register와 level-high GIC SPI 163·164를 사용합니다. 아홉 clock은 BPMP에서 공급됩니다.

XUSBC·XUSBA power domain, host read·write memory interconnect, XUSB host SMMU stream ID와 pad controller를 연결합니다. PHY는 USB2 port 0·1과 USB3 port 0입니다.

examples:
  - |
    #include <dt-bindings/clock/tegra186-clock.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/memory/tegra186-mc.h>
    #include <dt-bindings/power/tegra186-powergate.h>
    #include <dt-bindings/reset/tegra186-reset.h>

    usb@3530000 {
        compatible = "nvidia,tegra186-xusb";
        reg = <0x03530000 0x8000>,
              <0x03538000 0x1000>;
        reg-names = "hcd", "fpci";
        interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&bpmp TEGRA186_CLK_XUSB_HOST>,
                 <&bpmp TEGRA186_CLK_XUSB_FALCON>,
                 <&bpmp TEGRA186_CLK_XUSB_SS>,
                 <&bpmp TEGRA186_CLK_XUSB_CORE_SS>,
                 <&bpmp TEGRA186_CLK_CLK_M>,
                 <&bpmp TEGRA186_CLK_XUSB_FS>,
                 <&bpmp TEGRA186_CLK_PLLU>,
                 <&bpmp TEGRA186_CLK_CLK_M>,
                 <&bpmp TEGRA186_CLK_PLLE>;
        clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss",
                      "xusb_ss_src", "xusb_hs_src", "xusb_fs_src",
                      "pll_u_480m", "clk_m", "pll_e";
        power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
                        <&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
        power-domain-names = "xusb_host", "xusb_ss";
        interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &emc>,
                        <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTW &emc>;
        interconnect-names = "dma-mem", "write";
        iommus = <&smmu TEGRA186_SID_XUSB_HOST>;
        nvidia,xusb-padctl = <&padctl>;

        #address-cells = <1>;
        #size-cells = <0>;

        phys = <&phy_usb2_0>, <&phy_usb2_1>, <&phy_usb3_0>;
        phy-names = "usb2-0", "usb2-1", "usb3-0";
    };