요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra XUSB device mode controller (XUDC)
description:
The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and
USB 3.0 SuperSpeed protocols.
maintainers:
- Nagarjuna Kristam <[email protected]>
- JC Kuo <[email protected]>
- Thierry Reding <[email protected]>
properties:
compatible:
items:
- enum:
- nvidia,tegra210-xudc # For Tegra210
- nvidia,tegra186-xudc # For Tegra186
- nvidia,tegra194-xudc # For Tegra194
- nvidia,tegra234-xudc # For Tegra234
reg:
minItems: 2
items:
- description: XUSB device controller registers
- description: XUSB device PCI Config registers
- description: XUSB device registers.
reg-names:
minItems: 2
items:
- const: base
- const: fpci
- const: ipfs
interrupts:
maxItems: 1
description: Must contain the XUSB device interrupt.
clocks:
minItems: 4
items:
- description: Clock to enable core XUSB dev clock.
- description: Clock to enable XUSB super speed clock.
- description: Clock to enable XUSB super speed dev clock.
- description: Clock to enable XUSB high speed dev clock.
- description: Clock to enable XUSB full speed dev clock.
clock-names:
minItems: 4
items:
- const: dev
- const: ss
- const: ss_src
- const: fs_src
- const: hs_src
interconnects:
items:
- description: memory read client
- description: memory write client
interconnect-names:
items:
- const: dma-mem # read
- const: write
iommus:
maxItems: 1
power-domains:
items:
- description: XUSBB(device) power-domain
- description: XUSBA(superspeed) power-domain
power-domain-names:
items:
- const: dev
- const: ss
nvidia,xusb-padctl:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle to the XUSB pad controller that is used to configure the USB pads
used by the XUDC controller.
phys:
minItems: 1
maxItems: 2
description:
Must contain an entry for each entry in phy-names.
See ../phy/phy-bindings.txt for details.
phy-names:
minItems: 1
items:
- const: usb2-0
- const: usb3-0
avddio-usb-supply:
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
hvdd-usb-supply:
description: USB controller power supply. Must supply 3.3 V.
dma-coherent: true
required:
- compatible
- reg
- reg-names
- interrupts
- clocks
- clock-names
- power-domains
- power-domain-names
- nvidia,xusb-padctl
- phys
- phy-names
allOf:
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra210-xudc
then:
properties:
reg:
minItems: 3
reg-names:
minItems: 3
clocks:
minItems: 5
clock-names:
minItems: 5
required:
- avddio-usb-supply
- hvdd-usb-supply
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra186-xudc
- nvidia,tegra194-xudc
- nvidia,tegra234-xudc
then:
properties:
reg:
maxItems: 2
reg-names:
maxItems: 2
clocks:
maxItems: 4
clock-names:
maxItems: 4
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra194-xudc
- nvidia,tegra234-xudc
then:
required:
- dma-coherent
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
usb@700d0000 {
compatible = "nvidia,tegra210-xudc";
reg = <0x700d0000 0x8000>,
<0x700d8000 0x1000>,
<0x700d9000 0x1000>;
reg-names = "base", "fpci", "ipfs";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
power-domains = <&pd_xusbdev>, <&pd_xusbss>;
power-domain-names = "dev", "ss";
nvidia,xusb-padctl = <&padctl>;
phys = <µ_b>;
phy-names = "usb2-0";
avddio-usb-supply = <&vdd_pex_1v05>;
hvdd-usb-supply = <&vdd_3v3_sys>;
};
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
NVIDIA Tegra XUSB device controller
1-17GPL-2.0 또는 BSD-2-Clause로 배포되는 이 schema는 NVIDIA Tegra XUSB device-mode controller(XUDC)를 정의합니다. XUDC는 USB 2.0 High-Speed·Full-Speed와 USB 3.0 SuperSpeed protocol을 지원합니다. 관리자는 Nagarjuna Kristam, JC Kuo, Thierry Reding입니다.
SoC compatible, register와 interrupt
18-44지원 SoC는 Tegra210, Tegra186, Tegra194, Tegra234입니다. register는 device controller `base`, PCI configuration `fpci`, device register `ipfs` 순서이며 최소 두 개가 필요합니다.
interrupt는 XUSB device interrupt 하나입니다.
properties:
compatible:
items:
- enum:
- nvidia,tegra210-xudc # For Tegra210
- nvidia,tegra186-xudc # For Tegra186
- nvidia,tegra194-xudc # For Tegra194
- nvidia,tegra234-xudc # For Tegra234
reg:
minItems: 2
items:
- description: XUSB device controller registers
- description: XUSB device PCI Config registers
- description: XUSB device registers.
reg-names:
minItems: 2
items:
- const: base
- const: fpci
- const: ipfs
interrupts:
maxItems: 1
description: Must contain the XUSB device interrupt.
Clock, interconnect와 power domain
45-84clock은 core XUSB device, XUSB SuperSpeed, SuperSpeed device source, High-Speed device source, Full-Speed device source용으로 schema에 나열되며 최소 네 개가 필요합니다. 이름 순서는 `dev`, `ss`, `ss_src`, `fs_src`, `hs_src`입니다.
interconnect는 memory read client와 write client 순서이고 이름은 `dma-mem`, `write`입니다. power domain은 XUSBB device와 XUSBA SuperSpeed 순서이며 이름은 `dev`, `ss`입니다.
clocks:
minItems: 4
items:
- description: Clock to enable core XUSB dev clock.
- description: Clock to enable XUSB super speed clock.
- description: Clock to enable XUSB super speed dev clock.
- description: Clock to enable XUSB high speed dev clock.
- description: Clock to enable XUSB full speed dev clock.
clock-names:
minItems: 4
items:
- const: dev
- const: ss
- const: ss_src
- const: fs_src
- const: hs_src
interconnects:
items:
- description: memory read client
- description: memory write client
interconnect-names:
items:
- const: dma-mem # read
- const: write
iommus:
maxItems: 1
power-domains:
items:
- description: XUSBB(device) power-domain
- description: XUSBA(superspeed) power-domain
power-domain-names:
items:
- const: dev
- const: ss
Pad controller, PHY와 analog supply
85-112`nvidia,xusb-padctl`은 XUDC가 사용하는 USB pad를 구성하는 XUSB pad controller phandle입니다. PHY는 1~2개이고 이름은 USB2용 `usb2-0`, USB3용 `usb3-0` 순서입니다.
`avddio-usb-supply`는 PCIe/USB3 analog logic에 1.05 V를, `hvdd-usb-supply`는 USB controller에 3.3 V를 공급합니다. coherent DMA도 지원합니다.
nvidia,xusb-padctl:
$ref: /schemas/types.yaml#/definitions/phandle
description:
phandle to the XUSB pad controller that is used to configure the USB pads
used by the XUDC controller.
phys:
minItems: 1
maxItems: 2
description:
Must contain an entry for each entry in phy-names.
See ../phy/phy-bindings.txt for details.
phy-names:
minItems: 1
items:
- const: usb2-0
- const: usb3-0
avddio-usb-supply:
description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.
hvdd-usb-supply:
description: USB controller power supply. Must supply 3.3 V.
dma-coherent: true
공통 필수 속성
113-125필수 속성은 `compatible`, `reg`, `reg-names`, `interrupts`, `clocks`, `clock-names`, `power-domains`, `power-domain-names`, `nvidia,xusb-padctl`, `phys`, `phy-names`입니다.
required:
- compatible
- reg
- reg-names
- interrupts
- clocks
- clock-names
- power-domains
- power-domain-names
- nvidia,xusb-padctl
- phys
- phy-names
Tegra 세대별 resource 제약
126-178Tegra210은 register와 register 이름이 최소 세 개, clock과 clock 이름이 최소 다섯 개여야 하며 1.05 V `avddio-usb-supply`와 3.3 V `hvdd-usb-supply`도 필수입니다.
Tegra186, Tegra194, Tegra234는 register를 최대 두 개, clock을 최대 네 개 사용합니다. Tegra194와 Tegra234는 `dma-coherent`가 필수입니다. 정의되지 않은 추가 속성은 허용하지 않습니다.
allOf:
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra210-xudc
then:
properties:
reg:
minItems: 3
reg-names:
minItems: 3
clocks:
minItems: 5
clock-names:
minItems: 5
required:
- avddio-usb-supply
- hvdd-usb-supply
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra186-xudc
- nvidia,tegra194-xudc
- nvidia,tegra234-xudc
then:
properties:
reg:
maxItems: 2
reg-names:
maxItems: 2
clocks:
maxItems: 4
clock-names:
maxItems: 4
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra194-xudc
- nvidia,tegra234-xudc
then:
required:
- dma-coherent
additionalProperties: false
Tegra210 XUDC 예제
179-211예제 `usb@700d0000`은 `base`, `fpci`, `ipfs` register 세 개와 level-high GIC SPI 44를 사용합니다. 다섯 clock 이름은 `dev`, `ss`, `ss_src`, `fs_src`, `hs_src`입니다.
device·SuperSpeed power domain과 XUSB pad controller, `usb2-0` PHY를 연결하고 1.05 V 및 3.3 V regulator를 공급합니다.
examples:
- |
#include <dt-bindings/clock/tegra210-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
usb@700d0000 {
compatible = "nvidia,tegra210-xudc";
reg = <0x700d0000 0x8000>,
<0x700d8000 0x1000>,
<0x700d9000 0x1000>;
reg-names = "base", "fpci", "ipfs";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
power-domains = <&pd_xusbdev>, <&pd_xusbss>;
power-domain-names = "dev", "ss";
nvidia,xusb-padctl = <&padctl>;
phys = <µ_b>;
phy-names = "usb2-0";
avddio-usb-supply = <&vdd_pex_1v05>;
hvdd-usb-supply = <&vdd_3v3_sys>;
};
요약과 해설
nvidia,tegra-xudc.yaml:1-211Tegra XUDC의 register·clock·power·PHY와 SoC 세대별 resource 제약을 설명합니다. 접을 수 있는 영어 원문 전체와 한국어 전문 번역을 함께 제공하며, compatible, register, interrupt, clock, PHY, supply, source path와 원문 줄 좌표를 원형대로 보존합니다.