요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/fsl,ssi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Synchronous Serial Interface
maintainers:
- Shengjiu Wang <[email protected]>
description:
Notes on fsl,playback-dma and fsl,capture-dma
On SOCs that have an SSI, specific DMA channels are hard-wired for playback
and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
playback and DMA channel 3 for capture. The developer can choose which
DMA controller to use, but the channels themselves are hard-wired. The
purpose of these two properties is to represent this hardware design.
The device tree nodes for the DMA channels that are referenced by
"fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
"fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
"fsl,mpc8610-dma-channel") can remain. If these nodes are left as
"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA
drivers (fsldma) will attempt to use them, and it will conflict with the
sound drivers.
properties:
compatible:
oneOf:
- items:
- enum:
- fsl,imx50-ssi
- fsl,imx53-ssi
- const: fsl,imx51-ssi
- const: fsl,imx21-ssi
- items:
- enum:
- fsl,imx25-ssi
- fsl,imx27-ssi
- fsl,imx35-ssi
- fsl,imx51-ssi
- const: fsl,imx21-ssi
- items:
- enum:
- fsl,imx6q-ssi
- fsl,imx6sl-ssi
- fsl,imx6sx-ssi
- const: fsl,imx51-ssi
- items:
- const: fsl,imx21-ssi
- items:
- const: fsl,mpc8610-ssi
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: The ipg clock for register access
- description: clock for SSI master mode
minItems: 1
clock-names:
items:
- const: ipg
- const: baud
minItems: 1
dmas:
oneOf:
- items:
- description: DMA controller phandle and request line for RX
- description: DMA controller phandle and request line for TX
- items:
- description: DMA controller phandle and request line for RX0
- description: DMA controller phandle and request line for TX0
- description: DMA controller phandle and request line for RX1
- description: DMA controller phandle and request line for TX1
dma-names:
oneOf:
- items:
- const: rx
- const: tx
- items:
- const: rx0
- const: tx0
- const: rx1
- const: tx1
"#sound-dai-cells":
const: 0
description: optional, some dts node didn't add it.
cell-index:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
description: The SSI index
ac97-gpios:
$ref: /schemas/types.yaml#/definitions/phandle-array
description: Please refer to soc-ac97link.txt
codec-handle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to a 'codec' node that defines an audio
codec connected to this SSI. This node is typically
a child of an I2C or other control node.
fsl,fifo-depth:
$ref: /schemas/types.yaml#/definitions/uint32
description:
The number of elements in the transmit and receive FIFOs.
This number is the maximum allowed value for SFCSR[TFWM0].
enum: [8, 15]
fsl,fiq-stream-filter:
type: boolean
description:
Disabled DMA and use FIQ instead to filter the codec stream.
This is necessary for some boards where an incompatible codec
is connected to this SSI, e.g. on pca100 and pcm043.
fsl,mode:
$ref: /schemas/types.yaml#/definitions/string
enum: [ ac97-slave, ac97-master, i2s-slave, i2s-master,
lj-slave, lj-master, rj-slave, rj-master ]
description: |
"ac97-slave" - AC97 mode, SSI is clock slave
"ac97-master" - AC97 mode, SSI is clock master
"i2s-slave" - I2S mode, SSI is clock slave
"i2s-master" - I2S mode, SSI is clock master
"lj-slave" - Left justified mode, SSI is clock slave
"lj-master" - Left justified mode, SSI is clock master
"rj-slave" - Right justified mode, SSI is clock slave
"rj-master" - Right justified mode, SSI is clock master
fsl,ssi-asynchronous:
type: boolean
description: If specified, the SSI is to be programmed in asynchronous
mode. In this mode, pins SRCK, STCK, SRFS, and STFS must
all be connected to valid signals. In synchronous mode,
SRCK and SRFS are ignored. Asynchronous mode allows
playback and capture to use different sample sizes and
sample rates. Some drivers may require that SRCK and STCK
be connected together, and SRFS and STFS be connected
together. This would still allow different sample sizes,
but not different sample rates.
fsl,playback-dma:
$ref: /schemas/types.yaml#/definitions/phandle
description: Phandle to a node for the DMA channel to use for
playback of audio. This is typically dictated by SOC
design. Only used on Power Architecture.
fsl,capture-dma:
$ref: /schemas/types.yaml#/definitions/phandle
description: Phandle to a node for the DMA channel to use for
capture (recording) of audio. This is typically dictated
by SOC design. Only used on Power Architecture.
required:
- compatible
- reg
- interrupts
- fsl,fifo-depth
allOf:
- $ref: dai-common.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
ssi@2028000 {
compatible = "fsl,imx6q-ssi", "fsl,imx51-ssi";
reg = <0x02028000 0x4000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_SSI1_IPG>,
<&clks IMX6QDL_CLK_SSI1>;
clock-names = "ipg", "baud";
dmas = <&sdma 37 1 0>, <&sdma 38 1 0>;
dma-names = "rx", "tx";
#sound-dai-cells = <0>;
fsl,fifo-depth = <15>;
};
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
Power Architecture의 고정 DMA channel
1-28`fsl,playback-dma`와 `fsl,capture-dma`는 SSI의 playback/capture DMA channel이 SoC hardware에 고정된 설계를 나타냅니다. 예를 들어 MPC8610의 SSI1은 playback channel 0과 capture channel 1, SSI2는 playback channel 2와 capture channel 3을 사용합니다. DMA controller는 선택할 수 있지만 channel 번호는 고정됩니다.
두 속성이 참조하는 DMA channel node는 `fsl,ssi-dma-channel` compatible로 표시해야 합니다. SoC별 `fsl,mpc8610-dma-channel`은 함께 유지할 수 있습니다. `fsl,elo-dma-channel` 또는 `fsl,eloplus-dma-channel`로 남기면 generic Elo DMA driver `fsldma`가 사용하려 해 sound driver와 충돌합니다.
SSI compatible, register와 IRQ
29-61i.MX50·53은 fallback `fsl,imx51-ssi`, `fsl,imx21-ssi`를 연속으로 사용합니다. i.MX25·27·35·51은 fallback `fsl,imx21-ssi`, i.MX6Q·6SL·6SX는 fallback `fsl,imx51-ssi`를 사용합니다. `fsl,imx21-ssi`와 `fsl,mpc8610-ssi`는 단독 compatible입니다.
`reg`와 `interrupts`는 각각 최대 한 항목입니다.
IPG·baud clock과 2/4-channel DMA
62-99`clocks`는 register 접근용 IPG clock과 SSI master mode용 clock 순서이며 최소 한 항목입니다. `clock-names`는 `ipg`, `baud` 순서입니다.
`dmas`는 RX·TX 두 항목이거나 RX0·TX0·RX1·TX1 네 항목입니다. `dma-names`도 각각 `rx`, `tx` 또는 `rx0`, `tx0`, `rx1`, `tx1` 순서입니다. 선택적 `#sound-dai-cells`는 0입니다.
Index, AC97 GPIO, codec와 FIFO
100-122`cell-index`는 SSI index 0, 1, 2 중 하나입니다. `ac97-gpios`는 `soc-ac97link.txt`를 참조하는 phandle array입니다. `codec-handle`은 보통 I2C 등 control node의 child인 audio codec node를 가리킵니다.
`fsl,fifo-depth`는 TX/RX FIFO element 수이며 `SFCSR[TFWM0]`에 허용되는 최대값입니다. 값은 8 또는 15입니다.
FIQ filter, audio mode와 asynchronous mode
123-167`fsl,fiq-stream-filter`는 DMA를 끄고 FIQ로 codec stream을 filter합니다. PCA100과 PCM043처럼 호환되지 않는 codec이 연결된 board에 필요합니다.
`fsl,mode`는 `ac97-slave`, `ac97-master`, `i2s-slave`, `i2s-master`, `lj-slave`, `lj-master`, `rj-slave`, `rj-master` 중 하나로 AC97·I2S·left-justified·right-justified protocol과 SSI의 clock slave/master 역할을 함께 지정합니다.
`fsl,ssi-asynchronous` mode에서는 SRCK, STCK, SRFS, STFS가 모두 유효한 signal에 연결되어야 하며 playback과 capture가 서로 다른 sample size와 rate를 쓸 수 있습니다. Synchronous mode에서는 SRCK와 SRFS를 무시합니다. Driver가 SRCK-STCK와 SRFS-STFS 연결을 요구하면 size는 달라도 rate는 같아야 합니다.
`fsl,playback-dma`와 `fsl,capture-dma`는 Power Architecture에서만 쓰는 playback/capture DMA channel node phandle입니다.
필수 속성과 DAI 공통 규칙
168-178필수 속성은 `compatible`, `reg`, `interrupts`, `fsl,fifo-depth`입니다. `dai-common.yaml#`을 상속하고 평가되지 않은 추가 속성을 허용하지 않습니다.
i.MX6Q SSI1 예제
179-194예제는 `0x02028000`의 i.MX6Q SSI에 fallback `fsl,imx51-ssi`, GIC SPI 46, IPG·baud clock, RX/TX SDMA request 37·38을 연결하고 FIFO depth를 15로 설정합니다.
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
ssi@2028000 {
compatible = "fsl,imx6q-ssi", "fsl,imx51-ssi";
reg = <0x02028000 0x4000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_SSI1_IPG>,
<&clks IMX6QDL_CLK_SSI1>;
clock-names = "ipg", "baud";
dmas = <&sdma 37 1 0>, <&sdma 38 1 0>;
dma-names = "rx", "tx";
#sound-dai-cells = <0>;
fsl,fifo-depth = <15>;
};
요약과 해설
fsl,ssi.yaml:1-194Freescale/NXP codec, SOF processor, S/PDIF와 SSI의 clock·DMA·전원·signal mode를 먼저 해설하고, 접을 수 있는 영어 원문 전체와 표·symbol·줄 좌표를 보존한 한국어 전문 번역을 제공합니다.