요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
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* Marvell Armada 39x SoC pinctrl driver for mpp
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Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
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part and usage.
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Required properties:
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- compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
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"marvell,88f6928-pinctrl" depending on the specific variant of the
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SoC being used.
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- reg: register specifier of MPP registers
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Available mpp pins/groups and functions:
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Note: brackets (x) are not part of the mpp name for marvell,function and given
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only for more detailed description in this document.
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name pins functions
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================================================================================
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mpp0 0 gpio, ua0(rxd)
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mpp1 1 gpio, ua0(txd)
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mpp2 2 gpio, i2c0(sck)
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mpp3 3 gpio, i2c0(sda)
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mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
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mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
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mpp6 6 gpio, dev(cs3), xsmi(mdio)
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mpp7 7 gpio, dev(ad9), xsmi(mdc)
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mpp8 8 gpio, dev(ad10), ptp(trig)
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mpp9 9 gpio, dev(ad11), ptp(clk)
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mpp10 10 gpio, dev(ad12), ptp(evreq)
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mpp11 11 gpio, dev(ad13), led(clk)
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mpp12 12 gpio, pcie0(rstout), dev(ad14), led(stb)
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mpp13 13 gpio, dev(ad15), pcie2(clkreq), led(data)
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mpp14 14 gpio, dram(vttctrl), dev(we1), ua1(txd)
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mpp15 15 gpio, pcie0(rstout), spi0(mosi), i2c1(sck)
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mpp16 16 gpio, dram(deccerr), spi0(miso), pcie0(clkreq), i2c1(sda)
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mpp17 17 gpio, ua1(rxd), spi0(sck), sata1(prsnt) [1], sata0(prsnt) [1], smi(mdio)
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mpp18 18 gpio, ua1(txd), spi0(cs0), i2c2(sck)
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mpp19 19 gpio, sata1(prsnt) [1], ua0(cts), ua1(rxd), i2c2(sda)
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mpp20 20 gpio, sata0(prsnt) [1], ua0(rts), ua1(txd), smi(mdc)
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mpp21 21 gpio, spi0(cs1), sata0(prsnt) [1], sd0(cmd), dev(bootcs),
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sata1(prsnt) [1], ge(rxd0)
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mpp22 22 gpio, spi0(mosi), dev(ad0)
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mpp23 23 gpio, spi0(sck), dev(ad2)
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mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready)
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mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
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mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
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mpp27 27 gpio, spi0(cs3), i2c1(sda), sd0(d7), dev(cs2), ge(txclkout)
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mpp28 28 gpio, sd0(clk), dev(ad5), ge(txd0)
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mpp29 29 gpio, dev(ale0), ge(txd1)
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mpp30 30 gpio, dev(oe), ge(txd2)
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mpp31 31 gpio, dev(ale1), ge(txd3)
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mpp32 32 gpio, dev(we0), ge(txctl)
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mpp33 33 gpio, dram(deccerr), dev(ad3)
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mpp34 34 gpio, dev(ad1)
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mpp35 35 gpio, ref(clk), dev(a1)
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mpp36 36 gpio, dev(a0)
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mpp37 37 gpio, sd0(d3), dev(ad8), ge(rxclk)
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mpp38 38 gpio, ref(clk), sd0(d0), dev(ad4), ge(rxd1)
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mpp39 39 gpio, i2c1(sck), ua0(cts), sd0(d1), dev(a2), ge(rxd2)
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mpp40 40 gpio, i2c1(sda), ua0(rts), sd0(d2), dev(ad6), ge(rxd3)
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mpp41 41 gpio, ua1(rxd), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0), ge(rxctl)
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mpp42 42 gpio, ua1(txd), ua0(rts), dev(ad7)
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mpp43 43 gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), nand(rb1)
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mpp44 44 gpio, sata0(prsnt) [1], sata1(prsnt) [1], sata2(prsnt) [2],
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sata3(prsnt) [2], led(clk)
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mpp45 45 gpio, ref(clk), pcie0(rstout), ua1(rxd)
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mpp46 46 gpio, ref(clk), pcie0(rstout), ua1(txd), led(stb)
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mpp47 47 gpio, sata0(prsnt) [1], sata1(prsnt) [1], sata2(prsnt) [2],
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sata3(prsnt) [2], led(data)
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mpp48 48 gpio, sata0(prsnt) [1], dram(vttctrl), tdm(pclk) [2], audio(mclk) [2], sd0(d4), pcie0(clkreq), ua1(txd)
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mpp49 49 gpio, sata2(prsnt) [2], sata3(prsnt) [2], tdm(fsync) [2],
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audio(lrclk) [2], sd0(d5), ua2(rxd)
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mpp50 50 gpio, pcie0(rstout), tdm(drx) [2], audio(extclk) [2], sd0(cmd), ua2(rxd)
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mpp51 51 gpio, tdm(dtx) [2], audio(sdo) [2], dram(deccerr), ua2(txd)
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mpp52 52 gpio, pcie0(rstout), tdm(int) [2], audio(sdi) [2], sd0(d6), i2c3(sck)
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mpp53 53 gpio, sata1(prsnt) [1], sata0(prsnt) [1], tdm(rst) [2], audio(bclk) [2], sd0(d7), i2c3(sda)
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mpp54 54 gpio, sata0(prsnt) [1], sata1(prsnt) [1], pcie0(rstout), sd0(d3), ua3(txd)
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mpp55 55 gpio, ua1(cts), spi1(cs1), sd0(d0), ua1(rxd), ua3(rxd)
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mpp56 56 gpio, ua1(rts), dram(deccerr), spi1(mosi), ua1(txd)
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mpp57 57 gpio, spi1(sck), sd0(clk), ua1(txd)
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mpp58 58 gpio, i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(rxd)
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mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)
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[1]: only available on 88F6925/88F6928
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[2]: only available on 88F6928
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
Armada 39x MPP controller 속성
1-11Marvell Armada 39x SoC의 MPP pinctrl driver binding입니다. 공통 부분은 `marvell,mvebu-pinctrl.txt`를 참조합니다.
SoC variant에 따라 필수 `compatible`은 `marvell,88f6920-pinctrl`, `marvell,88f6925-pinctrl`, `marvell,88f6928-pinctrl` 중 하나입니다. `reg`에는 MPP register specifier를 지정합니다.
Armada 39x MPP pin과 function 전체 표
12-82괄호 안 설명과 각주 표시는 실제 `marvell,function` MPP 이름의 일부가 아닙니다. MPP0부터 MPP59까지의 pin 번호와 function 전체입니다.
| Name | Pins | Functions |
|---|---|---|
| mpp0 | 0 | gpio, ua0(rxd) |
| mpp1 | 1 | gpio, ua0(txd) |
| mpp2 | 2 | gpio, i2c0(sck) |
| mpp3 | 3 | gpio, i2c0(sda) |
| mpp4 | 4 | gpio, ua1(txd), ua0(rts), smi(mdc) |
| mpp5 | 5 | gpio, ua1(rxd), ua0(cts), smi(mdio) |
| mpp6 | 6 | gpio, dev(cs3), xsmi(mdio) |
| mpp7 | 7 | gpio, dev(ad9), xsmi(mdc) |
| mpp8 | 8 | gpio, dev(ad10), ptp(trig) |
| mpp9 | 9 | gpio, dev(ad11), ptp(clk) |
| mpp10 | 10 | gpio, dev(ad12), ptp(evreq) |
| mpp11 | 11 | gpio, dev(ad13), led(clk) |
| mpp12 | 12 | gpio, pcie0(rstout), dev(ad14), led(stb) |
| mpp13 | 13 | gpio, dev(ad15), pcie2(clkreq), led(data) |
| mpp14 | 14 | gpio, dram(vttctrl), dev(we1), ua1(txd) |
| mpp15 | 15 | gpio, pcie0(rstout), spi0(mosi), i2c1(sck) |
| mpp16 | 16 | gpio, dram(deccerr), spi0(miso), pcie0(clkreq), i2c1(sda) |
| mpp17 | 17 | gpio, ua1(rxd), spi0(sck), sata1(prsnt) [1], sata0(prsnt) [1], smi(mdio) |
| mpp18 | 18 | gpio, ua1(txd), spi0(cs0), i2c2(sck) |
| mpp19 | 19 | gpio, sata1(prsnt) [1], ua0(cts), ua1(rxd), i2c2(sda) |
| mpp20 | 20 | gpio, sata0(prsnt) [1], ua0(rts), ua1(txd), smi(mdc) |
| mpp21 | 21 | gpio, spi0(cs1), sata0(prsnt) [1], sd0(cmd), dev(bootcs), sata1(prsnt) [1], ge(rxd0) |
| mpp22 | 22 | gpio, spi0(mosi), dev(ad0) |
| mpp23 | 23 | gpio, spi0(sck), dev(ad2) |
| mpp24 | 24 | gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready) |
| mpp25 | 25 | gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0) |
| mpp26 | 26 | gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1) |
| mpp27 | 27 | gpio, spi0(cs3), i2c1(sda), sd0(d7), dev(cs2), ge(txclkout) |
| mpp28 | 28 | gpio, sd0(clk), dev(ad5), ge(txd0) |
| mpp29 | 29 | gpio, dev(ale0), ge(txd1) |
| mpp30 | 30 | gpio, dev(oe), ge(txd2) |
| mpp31 | 31 | gpio, dev(ale1), ge(txd3) |
| mpp32 | 32 | gpio, dev(we0), ge(txctl) |
| mpp33 | 33 | gpio, dram(deccerr), dev(ad3) |
| mpp34 | 34 | gpio, dev(ad1) |
| mpp35 | 35 | gpio, ref(clk), dev(a1) |
| mpp36 | 36 | gpio, dev(a0) |
| mpp37 | 37 | gpio, sd0(d3), dev(ad8), ge(rxclk) |
| mpp38 | 38 | gpio, ref(clk), sd0(d0), dev(ad4), ge(rxd1) |
| mpp39 | 39 | gpio, i2c1(sck), ua0(cts), sd0(d1), dev(a2), ge(rxd2) |
| mpp40 | 40 | gpio, i2c1(sda), ua0(rts), sd0(d2), dev(ad6), ge(rxd3) |
| mpp41 | 41 | gpio, ua1(rxd), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0), ge(rxctl) |
| mpp42 | 42 | gpio, ua1(txd), ua0(rts), dev(ad7) |
| mpp43 | 43 | gpio, pcie0(clkreq), dram(vttctrl), dram(deccerr), spi1(cs2), dev(clkout), nand(rb1) |
| mpp44 | 44 | gpio, sata0(prsnt) [1], sata1(prsnt) [1], sata2(prsnt) [2], sata3(prsnt) [2], led(clk) |
| mpp45 | 45 | gpio, ref(clk), pcie0(rstout), ua1(rxd) |
| mpp46 | 46 | gpio, ref(clk), pcie0(rstout), ua1(txd), led(stb) |
| mpp47 | 47 | gpio, sata0(prsnt) [1], sata1(prsnt) [1], sata2(prsnt) [2], sata3(prsnt) [2], led(data) |
| mpp48 | 48 | gpio, sata0(prsnt) [1], dram(vttctrl), tdm(pclk) [2], audio(mclk) [2], sd0(d4), pcie0(clkreq), ua1(txd) |
| mpp49 | 49 | gpio, sata2(prsnt) [2], sata3(prsnt) [2], tdm(fsync) [2], audio(lrclk) [2], sd0(d5), ua2(rxd) |
| mpp50 | 50 | gpio, pcie0(rstout), tdm(drx) [2], audio(extclk) [2], sd0(cmd), ua2(rxd) |
| mpp51 | 51 | gpio, tdm(dtx) [2], audio(sdo) [2], dram(deccerr), ua2(txd) |
| mpp52 | 52 | gpio, pcie0(rstout), tdm(int) [2], audio(sdi) [2], sd0(d6), i2c3(sck) |
| mpp53 | 53 | gpio, sata1(prsnt) [1], sata0(prsnt) [1], tdm(rst) [2], audio(bclk) [2], sd0(d7), i2c3(sda) |
| mpp54 | 54 | gpio, sata0(prsnt) [1], sata1(prsnt) [1], pcie0(rstout), sd0(d3), ua3(txd) |
| mpp55 | 55 | gpio, ua1(cts), spi1(cs1), sd0(d0), ua1(rxd), ua3(rxd) |
| mpp56 | 56 | gpio, ua1(rts), dram(deccerr), spi1(mosi), ua1(txd) |
| mpp57 | 57 | gpio, spi1(sck), sd0(clk), ua1(txd) |
| mpp58 | 58 | gpio, i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1), ua1(rxd) |
| mpp59 | 59 | gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2) |
Armada 39x variant 제한
83-84각주 `[1]` function은 88F6925와 88F6928에서만 사용할 수 있고 `[2]` function은 88F6928에서만 사용할 수 있습니다.
요약과 해설
marvell,armada-39x-pinctrl.txt:1-84세 compatible, 60행 MPP 표와 variant 제한을 정리합니다.