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Linux 6.18.37 · Devicetree Bindings

Micrel KSZ9021/KSZ9031/KSZ9131 PHY

KSZ90x1 계열 PHY의 clock/data pad skew 값과 master mode binding입니다.

Source pathDocumentation/devicetree/bindings/net/micrel-ksz90x1.txt
Source versionLinux v6.18.37
TranslationDUJINLABS 전문 번역 + 해설

요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.

1. 요약·해설

원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.

요약과 해설

micrel-ksz90x1.txt:1-228

세 세대의 skew encoding 차이와 datasheet 호환성 제약을 표로 정리합니다.

2. 영어 원문 전체

번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.

원문 전체 펼치기
1 Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY
2
3 Some boards require special tuning values, particularly when it comes
4 to clock delays. You can specify clock delay values in the PHY OF
5 device node. Deprecated, but still supported, these properties can
6 also be added to an Ethernet OF device node.
7
8 Note that these settings are applied after any phy-specific fixup from
9 phy_fixup_list (see phy_init_hw() from drivers/net/phy/phy_device.c),
10 and therefore may overwrite them.
11
12 KSZ9021:
13
14 All skew control options are specified in picoseconds. The minimum
15 value is 0, the maximum value is 3000, and it can be specified in 200ps
16 steps, *but* these values are in no way what you get because this chip's
17 skew values actually increase in 120ps steps, starting from -840ps. The
18 incorrect values came from an error in the original KSZ9021 datasheet
19 before it was corrected in revision 1.2 (Feb 2014), but it is too late to
20 change the driver now because of the many existing device trees that have
21 been created using values that go up in increments of 200.
22
23 The following table shows the actual skew delay you will get for each of the
24 possible devicetree values, and the number that will be programmed into the
25 corresponding pad skew register:
26
27 Device Tree Value Delay Pad Skew Register Value
28 -----------------------------------------------------
29 0 -840ps 0000
30 200 -720ps 0001
31 400 -600ps 0010
32 600 -480ps 0011
33 800 -360ps 0100
34 1000 -240ps 0101
35 1200 -120ps 0110
36 1400 0ps 0111
37 1600 120ps 1000
38 1800 240ps 1001
39 2000 360ps 1010
40 2200 480ps 1011
41 2400 600ps 1100
42 2600 720ps 1101
43 2800 840ps 1110
44 3000 960ps 1111
45
46 Optional properties:
47
48 - rxc-skew-ps : Skew control of RXC pad
49 - rxdv-skew-ps : Skew control of RX CTL pad
50 - txc-skew-ps : Skew control of TXC pad
51 - txen-skew-ps : Skew control of TX CTL pad
52 - rxd0-skew-ps : Skew control of RX data 0 pad
53 - rxd1-skew-ps : Skew control of RX data 1 pad
54 - rxd2-skew-ps : Skew control of RX data 2 pad
55 - rxd3-skew-ps : Skew control of RX data 3 pad
56 - txd0-skew-ps : Skew control of TX data 0 pad
57 - txd1-skew-ps : Skew control of TX data 1 pad
58 - txd2-skew-ps : Skew control of TX data 2 pad
59 - txd3-skew-ps : Skew control of TX data 3 pad
60
61 KSZ9031:
62
63 All skew control options are specified in picoseconds. The minimum
64 value is 0, and the maximum is property-dependent. The increment
65 step is 60ps. The default value is the neutral setting, so setting
66 rxc-skew-ps=<0> actually results in -900 picoseconds adjustment.
67
68 The KSZ9031 hardware supports a range of skew values from negative to
69 positive, where the specific range is property dependent. All values
70 specified in the devicetree are offset by the minimum value so they
71 can be represented as positive integers in the devicetree since it's
72 difficult to represent a negative number in the devictree.
73
74 The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps.
75
76 Pad Skew Value Delay (ps) Devicetree Value
77 ------------------------------------------------------
78 0_0000 -900ps 0
79 0_0001 -840ps 60
80 0_0010 -780ps 120
81 0_0011 -720ps 180
82 0_0100 -660ps 240
83 0_0101 -600ps 300
84 0_0110 -540ps 360
85 0_0111 -480ps 420
86 0_1000 -420ps 480
87 0_1001 -360ps 540
88 0_1010 -300ps 600
89 0_1011 -240ps 660
90 0_1100 -180ps 720
91 0_1101 -120ps 780
92 0_1110 -60ps 840
93 0_1111 0ps 900
94 1_0000 60ps 960
95 1_0001 120ps 1020
96 1_0010 180ps 1080
97 1_0011 240ps 1140
98 1_0100 300ps 1200
99 1_0101 360ps 1260
100 1_0110 420ps 1320
101 1_0111 480ps 1380
102 1_1000 540ps 1440
103 1_1001 600ps 1500
104 1_1010 660ps 1560
105 1_1011 720ps 1620
106 1_1100 780ps 1680
107 1_1101 840ps 1740
108 1_1110 900ps 1800
109 1_1111 960ps 1860
110
111 The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps
112 data pads, and the rxdv-skew-ps, txen-skew-ps control pads.
113
114 Pad Skew Value Delay (ps) Devicetree Value
115 ------------------------------------------------------
116 0000 -420ps 0
117 0001 -360ps 60
118 0010 -300ps 120
119 0011 -240ps 180
120 0100 -180ps 240
121 0101 -120ps 300
122 0110 -60ps 360
123 0111 0ps 420
124 1000 60ps 480
125 1001 120ps 540
126 1010 180ps 600
127 1011 240ps 660
128 1100 300ps 720
129 1101 360ps 780
130 1110 420ps 840
131 1111 480ps 900
132
133 Optional properties:
134
135 Maximum value of 1860, default value 900:
136
137 - rxc-skew-ps : Skew control of RX clock pad
138 - txc-skew-ps : Skew control of TX clock pad
139
140 Maximum value of 900, default value 420:
141
142 - rxdv-skew-ps : Skew control of RX CTL pad
143 - txen-skew-ps : Skew control of TX CTL pad
144 - rxd0-skew-ps : Skew control of RX data 0 pad
145 - rxd1-skew-ps : Skew control of RX data 1 pad
146 - rxd2-skew-ps : Skew control of RX data 2 pad
147 - rxd3-skew-ps : Skew control of RX data 3 pad
148 - txd0-skew-ps : Skew control of TX data 0 pad
149 - txd1-skew-ps : Skew control of TX data 1 pad
150 - txd2-skew-ps : Skew control of TX data 2 pad
151 - txd3-skew-ps : Skew control of TX data 3 pad
152
153 - micrel,force-master:
154 Boolean, force phy to master mode. Only set this option if the phy
155 reference clock provided at CLK125_NDO pin is used as MAC reference
156 clock because the clock jitter in slave mode is too high (errata#2).
157 Attention: The link partner must be configurable as slave otherwise
158 no link will be established.
159
160 KSZ9131:
161 LAN8841:
162
163 All skew control options are specified in picoseconds. The increment
164 step is 100ps. Unlike KSZ9031, the values represent picoseccond delays.
165 A negative value can be assigned as rxc-skew-psec = <(-100)>;.
166
167 Optional properties:
168
169 Range of the value -700 to 2400, default value 0:
170
171 - rxc-skew-psec : Skew control of RX clock pad
172 - txc-skew-psec : Skew control of TX clock pad
173
174 Range of the value -700 to 800, default value 0:
175
176 - rxdv-skew-psec : Skew control of RX CTL pad
177 - txen-skew-psec : Skew control of TX CTL pad
178 - rxd0-skew-psec : Skew control of RX data 0 pad
179 - rxd1-skew-psec : Skew control of RX data 1 pad
180 - rxd2-skew-psec : Skew control of RX data 2 pad
181 - rxd3-skew-psec : Skew control of RX data 3 pad
182 - txd0-skew-psec : Skew control of TX data 0 pad
183 - txd1-skew-psec : Skew control of TX data 1 pad
184 - txd2-skew-psec : Skew control of TX data 2 pad
185 - txd3-skew-psec : Skew control of TX data 3 pad
186
187 Examples:
188
189 /* Attach to an Ethernet device with autodetected PHY */
190 &enet {
191 rxc-skew-ps = <1800>;
192 rxdv-skew-ps = <0>;
193 txc-skew-ps = <1800>;
194 txen-skew-ps = <0>;
195 status = "okay";
196 };
197
198 /* Attach to an explicitly-specified PHY */
199 mdio {
200 phy0: ethernet-phy@0 {
201 rxc-skew-ps = <1800>;
202 rxdv-skew-ps = <0>;
203 txc-skew-ps = <1800>;
204 txen-skew-ps = <0>;
205 reg = <0>;
206 };
207 };
208 ethernet@70000 {
209 phy = <&phy0>;
210 phy-mode = "rgmii-id";
211 };
212
213 References
214
215 Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014.
216 http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf
217
218 Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014.
219 http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf
220
221 Notes:
222
223 Note that a previous version of the Micrel ksz9021rl/rn Data Sheet
224 was missing extended register 106 (transmit data pad skews), and
225 incorrectly specified the ps per step as 200ps/step instead of
226 120ps/step. The latest update to this document reflects the latest
227 revision of the Micrel specification even though usage in the kernel
228 still reflects that incorrect document.
229

3. 한국어 전문 번역

영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.

Micrel KSZ90x1 clock delay 조정

1-11

Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY 중 일부 board는 특히 clock delay에 별도 tuning 값이 필요합니다. PHY OF device node에서 clock delay를 지정할 수 있습니다.

더 이상 권장하지 않지만 Ethernet OF device node에 이 속성을 두는 방식도 계속 지원합니다. 설정은 `phy_fixup_list`의 PHY별 fixup 뒤에 적용되므로 `drivers/net/phy/phy_device.c`의 `phy_init_hw()`에서 적용한 값을 덮어쓸 수 있습니다.

KSZ9021 skew 값의 실제 의미

12-25

KSZ9021 skew control 값은 picosecond 단위로 0부터 3000까지 200ps 간격으로 지정합니다. 그러나 chip의 실제 skew는 -840ps에서 시작해 120ps씩 증가하므로 지정값과 실제 delay가 일치하지 않습니다.

이 잘못된 값은 2014년 2월의 KSZ9021 datasheet revision 1.2에서 수정되기 전 원본 datasheet 오류에서 비롯되었습니다. 이미 수많은 Device Tree가 200 단위 값을 사용하므로 driver 의미를 바꾸기에는 늦었습니다. 다음 표는 각 DT 값이 만드는 실제 skew delay와 pad skew register 값을 보여줍니다.

KSZ9021 Device Tree 값과 실제 delay

26-45
KSZ9021 skew mapping
Device Tree ValueDelayPad Skew Register Value
0-840ps0000
200-720ps0001
400-600ps0010
600-480ps0011
800-360ps0100
1000-240ps0101
1200-120ps0110
14000ps0111
1600120ps1000
1800240ps1001
2000360ps1010
2200480ps1011
2400600ps1100
2600720ps1101
2800840ps1110
3000960ps1111

원문의 16개 Device Tree 값, 실제 delay와 4-bit pad register 값을 보존합니다.

KSZ9021 선택 skew 속성

46-60

`rxc-skew-ps`, `rxdv-skew-ps`, `txc-skew-ps`, `txen-skew-ps`는 각각 RXC, RX CTL, TXC, TX CTL pad의 skew를 제어합니다.

`rxd0-skew-ps`부터 `rxd3-skew-ps`까지는 RX data pad 0-3, `txd0-skew-ps`부터 `txd3-skew-ps`까지는 TX data pad 0-3의 skew를 제어합니다.

KSZ9031 skew 값 encoding

61-73

KSZ9031 skew control도 picosecond 단위지만 최소값은 0이고 최대값은 속성마다 다르며 증가 간격은 60ps입니다. 기본값은 neutral setting이므로 `rxc-skew-ps=<0>`은 실제로 -900ps 조정을 만듭니다.

Hardware는 속성별로 음수부터 양수까지 skew 범위를 지원합니다. Device Tree에서 음수를 표현하기 어려우므로 지정값에는 실제 최소값만큼 offset을 더해 양의 정수로 표현합니다.

KSZ9031 clock pad 5-bit 값

74-110

다음 5-bit 값은 `rxc-skew-ps`와 `txc-skew-ps`에 적용됩니다.

KSZ9031 clock pad skew mapping
Pad Skew ValueDelay (ps)Devicetree Value
0_0000-900ps0
0_0001-840ps60
0_0010-780ps120
0_0011-720ps180
0_0100-660ps240
0_0101-600ps300
0_0110-540ps360
0_0111-480ps420
0_1000-420ps480
0_1001-360ps540
0_1010-300ps600
0_1011-240ps660
0_1100-180ps720
0_1101-120ps780
0_1110-60ps840
0_11110ps900
1_000060ps960
1_0001120ps1020
1_0010180ps1080
1_0011240ps1140
1_0100300ps1200
1_0101360ps1260
1_0110420ps1320
1_0111480ps1380
1_1000540ps1440
1_1001600ps1500
1_1010660ps1560
1_1011720ps1620
1_1100780ps1680
1_1101840ps1740
1_1110900ps1800
1_1111960ps1860

Clock pad register 값, 실제 delay와 Device Tree offset 값의 대응입니다.

KSZ9031 data/control pad 4-bit 값

111-132

다음 4-bit 값은 `txdX-skew-ps`, `rxdX-skew-ps` data pad와 `rxdv-skew-ps`, `txen-skew-ps` control pad에 적용됩니다.

KSZ9031 data and control pad skew mapping
Pad Skew ValueDelay (ps)Devicetree Value
0000-420ps0
0001-360ps60
0010-300ps120
0011-240ps180
0100-180ps240
0101-120ps300
0110-60ps360
01110ps420
100060ps480
1001120ps540
1010180ps600
1011240ps660
1100300ps720
1101360ps780
1110420ps840
1111480ps900

Data/control pad register 값과 60ps 간격 Device Tree 값의 대응입니다.

KSZ9031 선택 속성과 master mode

133-159

`rxc-skew-ps`와 `txc-skew-ps`의 최대값은 1860, 기본값은 900입니다. `rxdv-skew-ps`, `txen-skew-ps`, RX data 0-3과 TX data 0-3 skew 속성의 최대값은 900, 기본값은 420입니다.

Boolean `micrel,force-master`는 PHY를 master mode로 강제합니다. Slave mode clock jitter가 너무 큰 errata #2 때문에 `CLK125_NDO` pin의 PHY reference clock을 MAC reference clock으로 사용할 때만 설정해야 합니다. Link partner를 slave로 구성할 수 없으면 link가 성립하지 않습니다.

KSZ9131과 LAN8841 skew 속성

160-186

KSZ9131과 LAN8841의 skew control은 picosecond 단위이고 100ps씩 증가합니다. KSZ9031과 달리 값 자체가 picosecond delay를 나타내며 `rxc-skew-psec = <(-100)>;`처럼 음수를 지정할 수 있습니다.

`rxc-skew-psec`와 `txc-skew-psec` 범위는 -700부터 2400, 기본값은 0입니다. `rxdv-skew-psec`, `txen-skew-psec`, `rxd0-skew-psec`부터 `rxd3-skew-psec`, `txd0-skew-psec`부터 `txd3-skew-psec` 범위는 -700부터 800, 기본값은 0입니다.

Autodetect PHY와 명시적 PHY 예제

187-212

첫 예제는 autodetect된 PHY의 Ethernet device에 clock/control skew를 직접 둡니다. 두 번째 예제는 MDIO 주소 0의 명시적 PHY node에 같은 skew를 두고 Ethernet controller가 `rgmii-id` mode로 그 PHY를 참조합니다.

/* Attach to an Ethernet device with autodetected PHY */
&enet {
        rxc-skew-ps = <1800>;
        rxdv-skew-ps = <0>;
        txc-skew-ps = <1800>;
        txen-skew-ps = <0>;
        status = "okay";
};

/* Attach to an explicitly-specified PHY */
mdio {
        phy0: ethernet-phy@0 {
                rxc-skew-ps = <1800>;
                rxdv-skew-ps = <0>;
                txc-skew-ps = <1800>;
                txen-skew-ps = <0>;
                reg = <0>;
        };
};
ethernet@70000 {
        phy = <&phy0>;
        phy-mode = "rgmii-id";
};

Datasheet와 호환성 주의

213-228

참조 문서는 2014-02-13의 Micrel KSZ9021RL/RN Data Sheet revision 1.2와 2014-11-20의 KSZ9031RNX Data Sheet revision 2.1입니다.

KSZ9021 자료: `http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf`, KSZ9031 자료: `http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf`.

이전 KSZ9021RL/RN datasheet는 transmit data pad skew용 extended register 106을 빠뜨렸고 step을 실제 120ps가 아닌 200ps로 잘못 기재했습니다. 이 문서는 최신 specification을 반영하지만 kernel의 기존 사용 방식은 여전히 잘못된 이전 문서 의미를 유지합니다.