요약·해설과 원문, 전문 번역을 서로 분리했습니다. API 이름, symbol, source path는 원문 표기를 사용합니다.
1. 요약·해설
원문의 핵심 논리와 kernel programming 관점의 보충 설명입니다. 아래의 전문 번역과는 별도로 작성했습니다.
2. 영어 원문 전체
번역 기준이 된 Linux v6.18.37 원문입니다. 줄 번호는 이 버전의 파일 좌표입니다.
원문 전체 펼치기
================================
Register Usage for Linux/PA-RISC
================================
[ an asterisk is used for planned usage which is currently unimplemented ]
General Registers as specified by ABI
=====================================
Control Registers
-----------------
=============================== ===============================================
CR 0 (Recovery Counter) used for ptrace
CR 1-CR 7(undefined) unused
CR 8 (Protection ID) per-process value*
CR 9, 12, 13 (PIDS) unused
CR10 (CCR) lazy FPU saving*
CR11 as specified by ABI (SAR)
CR14 (interruption vector) initialized to fault_vector
CR15 (EIEM) initialized to all ones*
CR16 (Interval Timer) read for cycle count/write starts Interval Tmr
CR17-CR22 interruption parameters
CR19 Interrupt Instruction Register
CR20 Interrupt Space Register
CR21 Interrupt Offset Register
CR22 Interrupt PSW
CR23 (EIRR) read for pending interrupts/write clears bits
CR24 (TR 0) Kernel Space Page Directory Pointer
CR25 (TR 1) User Space Page Directory Pointer
CR26 (TR 2) not used
CR27 (TR 3) Thread descriptor pointer
CR28 (TR 4) not used
CR29 (TR 5) not used
CR30 (TR 6) current / 0
CR31 (TR 7) Temporary register, used in various places
=============================== ===============================================
Space Registers (kernel mode)
-----------------------------
=============================== ===============================================
SR0 temporary space register
SR4-SR7 set to 0
SR1 temporary space register
SR2 kernel should not clobber this
SR3 used for userspace accesses (current process)
=============================== ===============================================
Space Registers (user mode)
---------------------------
=============================== ===============================================
SR0 temporary space register
SR1 temporary space register
SR2 holds space of linux gateway page
SR3 holds user address space value while in kernel
SR4-SR7 Defines short address space for user/kernel
=============================== ===============================================
Processor Status Word
---------------------
=============================== ===============================================
W (64-bit addresses) 0
E (Little-endian) 0
S (Secure Interval Timer) 0
T (Taken Branch Trap) 0
H (Higher-privilege trap) 0
L (Lower-privilege trap) 0
N (Nullify next instruction) used by C code
X (Data memory break disable) 0
B (Taken Branch) used by C code
C (code address translation) 1, 0 while executing real-mode code
V (divide step correction) used by C code
M (HPMC mask) 0, 1 while executing HPMC handler*
C/B (carry/borrow bits) used by C code
O (ordered references) 1*
F (performance monitor) 0
R (Recovery Counter trap) 0
Q (collect interruption state) 1 (0 in code directly preceding an rfi)
P (Protection Identifiers) 1*
D (Data address translation) 1, 0 while executing real-mode code
I (external interrupt mask) used by cli()/sti() macros
=============================== ===============================================
"Invisible" Registers
---------------------
=============================== ===============================================
PSW default W value 0
PSW default E value 0
Shadow Registers used by interruption handler code
TOC enable bit 1
=============================== ===============================================
-------------------------------------------------------------------------
The PA-RISC architecture defines 7 registers as "shadow registers".
Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce
the state save and restore time by eliminating the need for general register
(GR) saves and restores in interruption handlers.
Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
-------------------------------------------------------------------------
Register usage notes, originally from John Marvin, with some additional
notes from Randolph Chung.
For the general registers:
r1,r2,r19-r26,r28,r29 & r31 can be used without saving them first. And of
course, you need to save them if you care about them, before calling
another procedure. Some of the above registers do have special meanings
that you should be aware of:
r1:
The addil instruction is hardwired to place its result in r1,
so if you use that instruction be aware of that.
r2:
This is the return pointer. In general you don't want to
use this, since you need the pointer to get back to your
caller. However, it is grouped with this set of registers
since the caller can't rely on the value being the same
when you return, i.e. you can copy r2 to another register
and return through that register after trashing r2, and
that should not cause a problem for the calling routine.
r19-r22:
these are generally regarded as temporary registers.
Note that in 64 bit they are arg7-arg4.
r23-r26:
these are arg3-arg0, i.e. you can use them if you
don't care about the values that were passed in anymore.
r28,r29:
are ret0 and ret1. They are what you pass return values
in. r28 is the primary return. When returning small structures
r29 may also be used to pass data back to the caller.
r30:
stack pointer
r31:
the ble instruction puts the return pointer in here.
r3-r18,r27,r30 need to be saved and restored. r3-r18 are just
general purpose registers. r27 is the data pointer, and is
used to make references to global variables easier. r30 is
the stack pointer.
3. 한국어 전문 번역
영어 원문의 문단 순서와 의미를 유지한 전체 번역입니다. 코드, 함수명, symbol과 URL은 원문 표기를 유지합니다.
ABI control register usage
1-38이 문서는 Linux/PA-RISC register usage를 정리하며 asterisk는 계획됐지만 아직 구현되지 않은 사용을 뜻합니다.
| Control register | Linux usage |
|---|---|
| `CR 0 (Recovery Counter)` | `used for ptrace` |
| `CR 1-CR 7(undefined)` | `unused` |
| `CR 8 (Protection ID)` | `per-process value*` |
| `CR 9, 12, 13 (PIDS)` | `unused` |
| `CR10 (CCR)` | `lazy FPU saving*` |
| `CR11` | `as specified by ABI (SAR)` |
| `CR14 (interruption vector)` | `initialized to fault_vector` |
| `CR15 (EIEM)` | `initialized to all ones*` |
| `CR16 (Interval Timer)` | `read for cycle count/write starts Interval Tmr` |
| `CR17-CR22` | `interruption parameters` |
| `CR19` | `Interrupt Instruction Register` |
| `CR20` | `Interrupt Space Register` |
| `CR21` | `Interrupt Offset Register` |
| `CR22` | `Interrupt PSW` |
| `CR23 (EIRR)` | `read for pending interrupts/write clears bits` |
| `CR24 (TR 0)` | `Kernel Space Page Directory Pointer` |
| `CR25 (TR 1)` | `User Space Page Directory Pointer` |
| `CR26 (TR 2)` | `not used` |
| `CR27 (TR 3)` | `Thread descriptor pointer` |
| `CR28 (TR 4)` | `not used` |
| `CR29 (TR 5)` | `not used` |
| `CR30 (TR 6)` | `current / 0` |
| `CR31 (TR 7)` | `Temporary register, used in various places` |
Kernel/user space register
39-59Kernel mode에서는 `SR3`가 현재 process의 userspace access에 쓰이고 `SR2`는 kernel이 보존해야 합니다. User mode에서는 `SR2`가 Linux gateway page space를, `SR3`가 kernel 진입 중 user address-space 값을 유지합니다.
| Kernel-mode space register | Usage |
|---|---|
| `SR0` | `temporary space register` |
| `SR4-SR7` | `set to 0` |
| `SR1` | `temporary space register` |
| `SR2` | `kernel should not clobber this` |
| `SR3` | `used for userspace accesses (current process)` |
| User-mode space register | Usage |
|---|---|
| `SR0` | `temporary space register` |
| `SR1` | `temporary space register` |
| `SR2` | `holds space of linux gateway page` |
| `SR3` | `holds user address space value while in kernel` |
| `SR4-SR7` | `Defines short address space for user/kernel` |
Processor Status Word
60-86| PSW field | Linux value/usage |
|---|---|
| `W (64-bit addresses)` | `0` |
| `E (Little-endian)` | `0` |
| `S (Secure Interval Timer)` | `0` |
| `T (Taken Branch Trap)` | `0` |
| `H (Higher-privilege trap)` | `0` |
| `L (Lower-privilege trap)` | `0` |
| `N (Nullify next instruction)` | `used by C code` |
| `X (Data memory break disable)` | `0` |
| `B (Taken Branch)` | `used by C code` |
| `C (code address translation)` | `1, 0 while executing real-mode code` |
| `V (divide step correction)` | `used by C code` |
| `M (HPMC mask)` | `0, 1 while executing HPMC handler*` |
| `C/B (carry/borrow bits)` | `used by C code` |
| `O (ordered references)` | `1*` |
| `F (performance monitor)` | `0` |
| `R (Recovery Counter trap)` | `0` |
| `Q (collect interruption state)` | `1 (0 in code directly preceding an rfi)` |
| `P (Protection Identifiers)` | `1*` |
| `D (Data address translation)` | `1, 0 while executing real-mode code` |
| `I (external interrupt mask)` | `used by cli()/sti() macros` |
`C`와 `D` translation bit는 보통 1이지만 real-mode code에서는 0입니다. `Q`는 interruption state 수집을 위해 1이며 `rfi` 직전 code에서만 0입니다. External interrupt mask `I`는 `cli()/sti()` macro가 사용합니다.
Invisible/shadow register
87-106| Invisible register | Value/usage |
|---|---|
| `PSW default W value` | `0` |
| `PSW default E value` | `0` |
| `Shadow Registers` | `used by interruption handler code` |
| `TOC enable bit` | `1` |
PA-RISC는 7개 shadow register를 정의합니다. `RETURN FROM INTERRUPTION AND RESTORE` instruction이 interruption handler의 general-register save/restore를 생략해 시간을 줄이는 데 사용합니다.
Shadow register는 원문 표기로 `GRs 1, 8, 9, 16, 17, 24, and 25`, 즉 general register `GR1`, `GR8`, `GR9`, `GR16`, `GR17`, `GR24`, `GR25`입니다.
Caller-clobbered general register
107-150John Marvin의 원래 note와 Randolph Chung의 추가 note에 따르면 `r1`, `r2`, `r19-r26`, `r28`, `r29`, `r31`은 먼저 저장하지 않고 쓸 수 있습니다. 다만 다른 procedure를 call한 뒤 값이 필요하면 caller가 저장해야 합니다.
| Register | 특수 의미 |
|---|---|
| `r1` | `addil` instruction 결과가 고정적으로 기록됨 |
| `r2` | Return pointer. 다른 register로 복사해 그 register로 return할 수 있으며 callee 뒤 원래 값 보장은 없음 |
| `r19-r22` | Temporary register, 64-bit에서는 `arg7-arg4` |
| `r23-r26` | `arg3-arg0`; 전달값이 더 필요 없을 때 사용 가능 |
| `r28`, `r29` | `ret0`, `ret1`; `r28`이 primary return이고 small structure는 `r29`도 사용 |
| `r30` | Stack pointer |
| `r31` | `ble` instruction이 return pointer를 기록 |
Callee-saved general register
151-154`r3-r18`, `r27`, `r30`은 저장하고 복원해야 합니다. `r3-r18`은 general-purpose register이고 `r27`은 global-variable reference를 쉽게 하는 data pointer, `r30`은 stack pointer입니다.
요약과 해설
registers.rst:1-154이 문서는 exception path의 control/space register와 procedure call의 caller/callee-save contract를 연결합니다. Real-mode bit 전환과 shadow register는 interruption latency와 debugging 정확도에 직접 영향을 줍니다.
Execution state와 procedure ABI의 register 집합입니다.
General register의 대표 ABI 역할입니다.