OP-TEE AArch64 _start와 TF-A 인자

QUESTION

OP-TEE AArch64 _start와 TF-A 인자 단계에서 실제로 바뀌는 상태는 무엇인가?

STRUCTURE

객체와 주소가 놓이는 구조

CALL PATH

실행 흐름

STATE LEDGER

단계별 입력과 출력

각 단계의 입력과 처리 후 바뀌는 상태를 정리한 표다. 사용 중인 소스 버전에서 다른 필드를 변경한다면 그에 맞춰 표도 수정한다.

분석 범위의 전제와 비교해, 다음 단계에 잘못된 입력을 넘긴 부분부터 조사한다.

VISUAL WALKTHROUGH

주소와 객체의 이동을 그림으로 읽기

아래 그림은 주소, 객체를 사용하는 기간, 제어권을 넘기는 시점을 중심으로 정리했다. 실제 주소와 크기는 사용 중인 보드의 bdinfo, 맵 파일과 링커 심벌로 확인한다.

UPSTREAM SOURCE

원본 코드

아래 코드는 OP-TEE OS 4.10.0의 core/arch/arm/kernel/entry_a64.S에서 141-229줄을 그대로 가져온 것이다. 설명을 위해 실제 코드를 가짜 의사 코드로 바꾸지 않았다.

141
142	.macro init_pauth_secondary_cpu
143		msr	spsel, #1
144		ldp	x0, x1, [sp, #THREAD_CORE_LOCAL_KEYS]
145		msr	spsel, #0
146		write_apiakeyhi x0
147		write_apiakeylo x1
148		mrs	x0, sctlr_el1
149		orr	x0, x0, #SCTLR_ENIA
150		msr	sctlr_el1, x0
151		isb
152	.endm
153
154	.macro init_pan
155		read_feat_pan x0
156		cmp	x0, #0
157		b.eq	1f
158		mrs	x0, sctlr_el1
159		bic	x0, x0, #SCTLR_SPAN
160		msr	sctlr_el1, x0
161		write_pan_enable
162	1:
163	.endm
164
165FUNC _start , :
166	/*
167	 * Temporary copy of boot argument registers, will be passed to
168	 * boot_save_args() further down.
169	 */
170	mov	x19, x0
171	mov	x20, x1
172	mov	x21, x2
173	mov	x22, x3
174
175	adr	x0, reset_vect_table
176	msr	vbar_el1, x0
177	isb
178
179#ifdef CFG_PAN
180	init_pan
181#endif
182
183	set_sctlr_el1
184	isb
185
186#ifdef CFG_WITH_PAGER
187	/*
188	 * Move init code into correct location and move hashes to a
189	 * temporary safe location until the heap is initialized.
190	 *
191	 * The binary is built as:
192	 * [Pager code, rodata and data] : In correct location
193	 * [Init code and rodata] : Should be copied to __init_start
194	 * [struct boot_embdata + data] : Should be saved before
195	 * initializing pager, first uint32_t tells the length of the data
196	 */
197	adr	x0, __init_start	/* dst */
198	adr	x1, __data_end		/* src */
199	adr	x2, __init_end
200	sub	x2, x2, x0		/* init len */
201	ldr	w4, [x1, x2]		/* length of hashes etc */
202	add	x2, x2, x4		/* length of init and hashes etc */
203	/* Copy backwards (as memmove) in case we're overlapping */
204	add	x0, x0, x2		/* __init_start + len */
205	add	x1, x1, x2		/* __data_end + len */
206	adr_l	x3, boot_cached_mem_end
207	str	x0, [x3]
208	adr	x2, __init_start
209copy_init:
210	ldp	x3, x4, [x1, #-16]!
211	stp	x3, x4, [x0, #-16]!
212	cmp	x0, x2
213	b.gt	copy_init
214#else
215	/*
216	 * The binary is built as:
217	 * [Core, rodata and data] : In correct location
218	 * [struct boot_embdata + data] : Should be moved to right before
219	 * __vcore_free_end, the first uint32_t tells the length of the
220	 * struct + data
221	 */
222	adr_l	x1, __data_end		/* src */
223	ldr	w2, [x1]		/* struct boot_embdata::total_len */
224	/* dst */
225	adr_l	x0, __vcore_free_end
226	sub	x0, x0, x2
227	/* round down to beginning of page */
228	bic	x0, x0, #(SMALL_PAGE_SIZE - 1)
229	adr_l	x3, boot_embdata_ptr

READING CONTRACT

발췌 범위와 읽기 기준

원문 141-229줄에는 앞뒤 문맥이 포함됩니다. 기준 구문 FUNC _start , :은 L165에 있습니다. 발췌 첫 줄을 함수 정의의 시작으로 해석하지 않습니다.

TF-A가 넘긴 x0-x3, 현재 EL, MMU/cache 상태와 load address를 첫 명령부터 추적한다. pageable image를 복사하는 구간과 아직 참조할 수 없는 전역도 구분한다.

RELATED SOURCE

함께 읽어야 하는 원본 코드

첫 코드 조각만으로 동작이 완성되지 않는 경우 호출 매크로, 객체 정의와 실제 실행 목록을 같은 페이지에 묶었다. 각 조각은 같은 기준 commit에서 가져왔다.

871}
872
873static bool add_padding_to_pool(vaddr_t va, size_t len, void *ptr __unused)
874{
875#ifdef CFG_NS_VIRTUALIZATION
876	nex_malloc_add_pool((void *)va, len);
877#else
878	malloc_add_pool((void *)va, len);
879#endif
880	return true;
881}
882
883static void init_primary(unsigned long pageable_part)
884{
885	vaddr_t va = 0;
886
887	/*
888	 * Mask asynchronous exceptions before switch to the thread vector
889	 * as the thread handler requires those to be masked while
890	 * executing with the temporary stack. The thread subsystem also
891	 * asserts that the foreign interrupts are blocked when using most of
892	 * its functions.
893	 */
894	thread_set_exceptions(THREAD_EXCP_ALL);
895	primary_save_cntfrq();
896	init_vfp_sec();
897
898	if (IS_ENABLED(CFG_CRYPTO_WITH_CE))
899		check_crypto_extensions();
900
901	init_asan();
902
903	/*
904	 * By default whole OP-TEE uses malloc, so we need to initialize
905	 * it early. But, when virtualization is enabled, malloc is used
906	 * only by TEE runtime, so malloc should be initialized later, for
907	 * every virtual partition separately. Core code uses nex_malloc
908	 * instead.
909	 */
910#ifdef CFG_WITH_PAGER
911	/* Add heap2 first as heap1 may be too small as initial bget pool */
912	malloc_add_pool(__heap2_start, __heap2_end - __heap2_start);
913#endif
914#ifdef CFG_NS_VIRTUALIZATION
915	nex_malloc_add_pool(__nex_heap_start, __nex_heap_end -
916					      __nex_heap_start);
917#else
918	malloc_add_pool(__heap1_start, __heap1_end - __heap1_start);
919#endif
920	IMSG_RAW("\n");
921	if (IS_ENABLED(CFG_DYN_CONFIG)) {
922		size_t sz = sizeof(struct thread_core_local) *
923			    CFG_TEE_CORE_NB_CORE;
924		void *p = boot_mem_alloc(sz, alignof(void *) * 2);
925
926#ifdef CFG_NS_VIRTUALIZATION
927		nex_malloc_add_pool(p, sz);
928#else
929		malloc_add_pool(p, sz);
930#endif
931	}
932
933	core_mmu_save_mem_map();
934	core_mmu_init_phys_mem();
935	boot_mem_foreach_padding(add_padding_to_pool, NULL);
936	va = boot_mem_release_unused();
937	if (!IS_ENABLED(CFG_WITH_PAGER)) {
938		/*
939		 * We must update boot_cached_mem_end to reflect the memory
940		 * just unmapped by boot_mem_release_unused().
941		 */
942		assert(va && va <= boot_cached_mem_end);
943		boot_cached_mem_end = va;
944	}
945
946	if (IS_ENABLED(CFG_DYN_CONFIG)) {
947		/*
948		 * This is needed to enable virt_page_alloc() now that
949		 * boot_mem_alloc() can't be used any longer.
950		 */
951		if (IS_ENABLED(CFG_NS_VIRTUALIZATION))
952			nex_page_alloc_init();
953		else
954			page_alloc_init();
955	}
956
957	if (IS_ENABLED(CFG_WITH_PAGER)) {
958		/*
959		 * Pager: init_runtime() calls thread_kernel_enable_vfp()
960		 * so we must set a current thread right now to avoid a
961		 * chicken-and-egg problem (thread_init_boot_thread() sets
962		 * the current thread but needs things set by
963		 * init_runtime()).
964		 */
965		thread_get_core_local()->curr_thread = 0;
966		init_pager_runtime(pageable_part);
967	}
968
969	/* Initialize canaries around the stacks */
970	thread_init_canaries();
971	thread_init_per_cpu();
972}
973
974static bool cpu_nmfi_enabled(void)
975{
976#if defined(ARM32)
977	return read_sctlr() & SCTLR_NMFI;
978#else
979	/* Note: ARM64 does not feature non-maskable FIQ support. */
980	return false;
981#endif
982}
983
984/*
985 * Note: this function is weak just to make it possible to exclude it from
986 * the unpaged area.
987 */
988void __weak boot_init_primary_late(unsigned long fdt __unused,
989				   unsigned long manifest __unused)
990{
991	size_t fdt_size = CFG_DTB_MAX_SIZE;
992
993	if (IS_ENABLED(CFG_TRANSFER_LIST) && mapped_tl) {

464#ifdef CFG_CORE_ASLR
465	unsigned int reloc_offs = (vaddr_t)__pageable_start - VCORE_START_VA;
466	const struct boot_embdata *embdata = (const void *)__init_end;
467	const void *reloc = __init_end + embdata->reloc_offset;
468
469	return fobj_ro_reloc_paged_alloc(num_pages, hashes, reloc_offs,
470					 reloc, embdata->reloc_len, store);
471#else
472	return fobj_ro_paged_alloc(num_pages, hashes, store);
473#endif
474}
475
476static void init_pager_runtime(unsigned long pageable_part)
477{
478	size_t n;
479	size_t init_size = (size_t)(__init_end - __init_start);
480	size_t pageable_start = (size_t)__pageable_start;
481	size_t pageable_end = (size_t)__pageable_end;
482	size_t pageable_size = pageable_end - pageable_start;
483	vaddr_t tzsram_end = TZSRAM_BASE + TZSRAM_SIZE - TEE_LOAD_ADDR +
484			     VCORE_START_VA;
485	size_t hash_size = (pageable_size / SMALL_PAGE_SIZE) *
486			   TEE_SHA256_HASH_SIZE;
487	const struct boot_embdata *embdata = (const void *)__init_end;
488	const void *tmp_hashes = NULL;
489	tee_mm_entry_t *mm = NULL;
490	struct fobj *fobj = NULL;
491	uint8_t *paged_store = NULL;
492	uint8_t *hashes = NULL;
493
494	assert(pageable_size % SMALL_PAGE_SIZE == 0);
495	assert(embdata->total_len >= embdata->hashes_offset +
496				     embdata->hashes_len);
497	assert(hash_size == embdata->hashes_len);
498
499	tmp_hashes = __init_end + embdata->hashes_offset;
500
501	/*
502	 * This needs to be initialized early to support address lookup
503	 * in MEM_AREA_TEE_RAM
504	 */
505	tee_pager_early_init();
506
507	hashes = malloc(hash_size);
508	IMSG_RAW("\n");
509	IMSG("Pager is enabled. Hashes: %zu bytes", hash_size);
510	assert(hashes);
511	asan_memcpy_unchecked(hashes, tmp_hashes, hash_size);
512
513	/*
514	 * The pager is about the be enabled below, eventual temporary boot
515	 * memory allocation must be removed now.
516	 */
517	boot_mem_release_tmp_alloc();
518
519	carve_out_asan_mem();
520
521	mm = nex_phys_mem_ta_alloc(pageable_size);
522	assert(mm);
523	paged_store = phys_to_virt(tee_mm_get_smem(mm),
524				   MEM_AREA_SEC_RAM_OVERALL, pageable_size);
525	/*
526	 * Load pageable part in the dedicated allocated area:
527	 * - Move pageable non-init part into pageable area. Note bootloader
528	 *   may have loaded it anywhere in TA RAM hence use memmove().
529	 * - Copy pageable init part from current location into pageable area.
530	 */
531	memmove(paged_store + init_size,
532		phys_to_virt(pageable_part,
533			     core_mmu_get_type_by_pa(pageable_part),
534			     __pageable_part_end - __pageable_part_start),
535		__pageable_part_end - __pageable_part_start);
536	asan_memcpy_unchecked(paged_store, __init_start, init_size);
537	/*
538	 * Undo eventual relocation for the init part so the hash checks
539	 * can pass.
540	 */
541	undo_init_relocation(paged_store);
542
543	/* Check that hashes of what's in pageable area is OK */
544	DMSG("Checking hashes of pageable area");
545	for (n = 0; (n * SMALL_PAGE_SIZE) < pageable_size; n++) {
546		const uint8_t *hash = hashes + n * TEE_SHA256_HASH_SIZE;
547		const uint8_t *page = paged_store + n * SMALL_PAGE_SIZE;
548		TEE_Result res;
549
550		DMSG("hash pg_idx %zu hash %p page %p", n, hash, page);
551		res = hash_sha256_check(hash, page, SMALL_PAGE_SIZE);
552		if (res != TEE_SUCCESS) {
553			EMSG("Hash failed for page %zu at %p: res 0x%x",
554			     n, (void *)page, res);
555			panic();
556		}
557	}
558
559	/*
560	 * Assert prepaged init sections are page aligned so that nothing
561	 * trails uninited at the end of the premapped init area.
562	 */
563	assert(!(init_size & SMALL_PAGE_MASK));
564
565	/*
566	 * Initialize the virtual memory pool used for main_mmu_l2_ttb which
567	 * is supplied to tee_pager_init() below.
568	 */
569	init_virt_pool(&core_virt_mem_pool);
570
571	/*
572	 * Assign alias area for pager end of the small page block the rest
573	 * of the binary is loaded into. We're taking more than needed, but
574	 * we're guaranteed to not need more than the physical amount of
575	 * TZSRAM.
576	 */
577	mm = tee_mm_alloc2(&core_virt_mem_pool,
578			   (vaddr_t)core_virt_mem_pool.lo +
579			   core_virt_mem_pool.size - TZSRAM_SIZE,
580			   TZSRAM_SIZE);
581	assert(mm);
582	tee_pager_set_alias_area(mm);
583
584	/*
585	 * Claim virtual memory which isn't paged.
586	 * Linear memory (flat map core memory) ends there.
587	 */
588	mm = tee_mm_alloc2(&core_virt_mem_pool, VCORE_UNPG_RX_PA,
589			   (vaddr_t)(__pageable_start - VCORE_UNPG_RX_PA));
590	assert(mm);
591
592	/*
593	 * Allocate virtual memory for the pageable area and let the pager
594	 * take charge of all the pages already assigned to that memory.
595	 */
596	mm = tee_mm_alloc2(&core_virt_mem_pool, (vaddr_t)__pageable_start,
597			   pageable_size);
598	assert(mm);
599	fobj = ro_paged_alloc(mm, hashes, paged_store);
600	assert(fobj);
601	tee_pager_add_core_region(tee_mm_get_smem(mm), PAGED_REGION_TYPE_RO,
602				  fobj);
603	fobj_put(fobj);
604
605	tee_pager_add_pages(pageable_start, init_size / SMALL_PAGE_SIZE, false);
606	tee_pager_add_pages(pageable_start + init_size,
607			    (pageable_size - init_size) / SMALL_PAGE_SIZE,
608			    true);
609	if (pageable_end < tzsram_end)
610		tee_pager_add_pages(pageable_end, (tzsram_end - pageable_end) /
611						   SMALL_PAGE_SIZE, true);
612
613	/*
614	 * There may be physical pages in TZSRAM before the core load address.
615	 * These pages can be added to the physical pages pool of the pager.
616	 * This setup may happen when a the secure bootloader runs in TZRAM
617	 * and its memory can be reused by OP-TEE once boot stages complete.
618	 */
619	tee_pager_add_pages(core_virt_mem_pool.lo,
620			    (VCORE_UNPG_RX_PA - core_virt_mem_pool.lo) /
621				SMALL_PAGE_SIZE,
622			    true);
623
624	print_pager_pool_size();
625}
626#else /*!CFG_WITH_PAGER*/
627static void init_pager_runtime(unsigned long pageable_part __unused)
628{
629}
630#endif
631
632#if defined(CFG_DT)
633static int add_optee_dt_node(struct dt_descriptor *dt)
634{
635	int offs;
636	int ret;
637
638	if (fdt_path_offset(dt->blob, "/firmware/optee") >= 0) {
639		DMSG("OP-TEE Device Tree node already exists!");
640		return 0;
641	}
642
643	offs = fdt_path_offset(dt->blob, "/firmware");
644	if (offs < 0) {
645		offs = add_dt_path_subnode(dt, "/", "firmware");
646		if (offs < 0)

DETAILS

내부 동작을 더 깊게 읽기

IMPLEMENTATION NOTES

구현을 읽을 때 놓치기 쉬운 부분

OBJECT LIFETIME

객체와 수명

FAILURE PATH

실패 지점과 증상

로그가 끊긴 함수뿐 아니라 그 함수에 주소, 크기, 플래그를 전달한 앞 단계도 조사한다. 오류 처리 후 등록된 객체나 하드웨어 설정이 그대로 남아 있는지도 확인한다.

EVIDENCE

소스 밖에서 확인할 증거

소스에서 파악한 동작을 실제 빌드 결과와 대상 보드의 로그로 확인한다. 아래 명령의 보드 이름과 툴체인 접두사는 사용 중인 빌드 환경에 맞게 바꾼다.

LAB

직접 확인할 실험

1. 01
   _start에서 x0-x3/SP/CurrentEL 기록

   _start 진입 전후에 secure load address의 주소·크기·반환값과 timestamp를 함께 남긴다.

2. 02
   tee.elf symbol과 runtime PC 대조

   boot args preserve 진입 전후에 boot arguments의 주소·크기·반환값과 timestamp를 함께 남긴다.

3. 03
   pager on/off entry 경로 비교

   relocate/BSS 진입 전후에 init stack의 주소·크기·반환값과 timestamp를 함께 남긴다.

PRIMARY REFERENCES

원문과 다음 글